RE: [PATCH v7 1/5] media: dt-bindings: nxp,imx8mq-mipi-csi2: Add i.MX8ULP compatible string
From: G.N. Zhou (OSS) <hidden>
Date: 2025-11-04 07:13:13
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imx, linux-devicetree, linux-media, lkml
Hi Laurent, Thanks for your review.
-----Original Message----- From: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Sent: Monday, October 27, 2025 8:06 AM To: G.N. Zhou (OSS) <redacted> Cc: Rui Miguel Silva <rmfrfs@gmail.com>; Martin Kepplinger [off-list ref]; Purism Kernel Team [off-list ref]; Mauro Carvalho Chehab [off-list ref]; Rob Herring [off-list ref]; Krzysztof Kozlowski [off-list ref]; Conor Dooley [off-list ref]; Shawn Guo [off-list ref]; Sascha Hauer [off-list ref]; Pengutronix Kernel Team [off-list ref]; Fabio Estevam [off-list ref]; Philipp Zabel [off-list ref]; Frank Li [off-list ref]; linux- media@vger.kernel.org; devicetree@vger.kernel.org; imx@lists.linux.dev; linux- arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; G.N. Zhou [off-list ref]; Conor Dooley [off-list ref] Subject: Re: [PATCH v7 1/5] media: dt-bindings: nxp,imx8mq-mipi-csi2: Add i.MX8ULP compatible string Hi Guoniu, On Thu, Oct 23, 2025 at 05:19:42PM +0800, Guoniu Zhou wrote:quoted
From: Guoniu Zhou <redacted> The CSI-2 receiver in the i.MX8ULP is almost identical to the version present in the i.MX8QXP/QM, but i.MX8ULP CSI-2 controller needs pclk clock as the input clock for its APB interface of Control and Status register(CSR). So add compatible string fsl,imx8ulp-mipi-csi2 and increase maxItems of Clocks (clock-names) to 4 from 3. And keep the same restriction for existing compatible. Reviewed-by: Frank Li <Frank.Li@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Guoniu Zhou <redacted> --- .../bindings/media/nxp,imx8mq-mipi-csi2.yaml | 41++++++++++++++++++++--quoted
1 file changed, 39 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml index3389bab266a9adbda313c8ad795b998641df12f3..da3978da1cab75292ada3f2 48374quoted
43f7f4ab6418 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml+++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yamquoted
+++ l@@ -20,6 +20,7 @@ properties: - enum: - fsl,imx8mq-mipi-csi2 - fsl,imx8qxp-mipi-csi2 + - fsl,imx8ulp-mipi-csi2 - items: - const: fsl,imx8qm-mipi-csi2 - const: fsl,imx8qxp-mipi-csi2 @@ -39,12 +40,16 @@properties: clock that the RX DPHY receives. - description: ui is the pixel clock (phy_ref up to 333Mhz). See the reference manual for details. + - description: pclk is clock for csr APB interface. + minItems: 3 clock-names: items: - const: core - const: esc - const: ui + - const: pclk + minItems: 3 power-domains: maxItems: 1@@ -130,19 +135,51 @@ allOf: compatible: contains: enum: - - fsl,imx8qxp-mipi-csi2 + - fsl,imx8ulp-mipi-csi2 + then: + properties: + reg: + minItems: 2 + resets: + minItems: 2 + maxItems: 2 + clocks: + minItems: 4 + clock-names: + minItems: 4Do we need the clock-names constraint ? The DT schemas will enforce that clocks and clock-names always have the same number of elements.
Yes, I prefer to have it since explicit constraint could make our yaml file more clear to show our design purpose. In addition, it can also help people who are not familiar with the implicit constraint in DT schema avoid making mistakes.
quoted
+ + - if: + properties: + compatible: + contains: + const: fsl,imx8qxp-mipi-csi2 then: properties: reg: minItems: 2 resets: maxItems: 1 - else: + clocks: + maxItems: 3 + clock-names: + maxItems: 3 + + - if: + properties: + compatible: + contains: + enum: + - fsl,imx8mq-mipi-csi2 + then: properties: reg: maxItems: 1 resets: minItems: 3 + clocks: + maxItems: 3 + clock-names: + maxItems: 3 required: - fsl,mipi-phy-gprCould you please sort those conditional blocks by alphabetical order of the compatible strings ?
Sure
-- Regards, Laurent Pinchart