Re: [PATCH 2/3] dt-bindings: iommu: Add NVIDIA Tegra CMDQV support
From: Krzysztof Kozlowski <krzk@kernel.org>
Date: 2025-10-31 08:14:28
Also in:
linux-devicetree, linux-iommu, linux-tegra, lkml
On Fri, Oct 31, 2025 at 06:29:58AM +0000, Ashish Mhetre wrote:
The Command Queue Virtualization (CMDQV) hardware is part of the SMMUv3 implementation on NVIDIA Tegra SoCs. It assists in virtualizing the command queue for the SMMU.
If this is specific to Nvidia, then I think you need specific front compatible and disallow it for other vendors.
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Add a new device tree binding document for nvidia,tegra264-cmdqv. Also update the arm,smmu-v3 binding to include an optional nvidia,cmdqv property. This property is a phandle to the CMDQV device node, allowing the SMMU driver to associate with its corresponding CMDQV instance. Signed-off-by: Ashish Mhetre <redacted> --- .../bindings/iommu/arm,smmu-v3.yaml | 10 ++++ .../bindings/iommu/nvidia,tegra264-cmdqv.yaml | 46 +++++++++++++++++++ 2 files changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yamldiff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml index 75fcf4cb52d9..edc0c20a0c80 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml@@ -58,6 +58,15 @@ properties: msi-parent: true + nvidia,cmdqv: + description: | + A phandle to its pairing CMDQV extension for an implementation on NVIDIA + Tegra SoC. + + If this property is absent, CMDQ-Virtualization won't be used and SMMU + will only use its own CMDQ. + $ref: /schemas/types.yaml#/definitions/phandle + hisilicon,broken-prefetch-cmd: type: boolean description: Avoid sending CMD_PREFETCH_* commands to the SMMU.@@ -92,4 +101,5 @@ examples: dma-coherent; #iommu-cells = <1>; msi-parent = <&its 0xff0000>; + nvidia,cmdqv = <&cmdqv>; };diff --git a/Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml b/Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml new file mode 100644 index 000000000000..f22c370278a3 --- /dev/null +++ b/Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml@@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra264 CMDQV
Missing blank line
+description: |
Do not need '|' unless you need to preserve formatting.
+ The CMDQ-Virtualization hardware block is part of the SMMUv3 implementation + on Tegra264 SoCs. It assists in virtualizing the command queue for the SMMU. + +maintainers: + - NVIDIA Corporation [off-list ref]
No. It should be a person. If entire Nvidia cannot find a person, I don't think we are interested in having this in the kernel.
+ +properties: + compatible: + const: nvidia,tegra264-cmdqv + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-names: + items: + - const: cmdqv
Drop interript names, obvious.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ cmdqv: cmdqv@8105200000 {Drop unused label Best regards, Krzysztof