Re: [PATCH v3 18/29] arm_mpam: Register and enable IRQs
From: Jonathan Cameron <jonathan.cameron@huawei.com>
Date: 2025-10-24 18:03:28
Also in:
linux-acpi, lkml
On Fri, 17 Oct 2025 18:56:34 +0000 James Morse [off-list ref] wrote:
Register and enable error IRQs. All the MPAM error interrupts indicate a software bug, e.g. out of range partid. If the error interrupt is ever signalled, attempt to disable MPAM. Only the irq handler accesses the MPAMF_ESR register, so no locking is needed. The work to disable MPAM after an error needs to happen at process context as it takes mutex. It also unregisters the interrupts, meaning it can't be done from the threaded part of a threaded interrupt. Instead, mpam_disable() gets scheduled. Enabling the IRQs in the MSC may involve cross calling to a CPU that can access the MSC. Once the IRQ is requested, the mpam_disable() path can be called asynchronously, which will walk structures sized by max_partid. Ensure this size is fixed before the interrupt is requested. CC: Rohit Mathew <redacted> Tested-by: Rohit Mathew <redacted> Tested-by: Fenghua Yu <fenghuay@nvidia.com> Signed-off-by: James Morse <james.morse@arm.com>
One trivial thing inline to reduce the patch churn a tiny bit. May not be worth the hassle. Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
quoted hunk ↗ jump to hunk
diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c index 545482e112b7..f18a22f825a0 100644 --- a/drivers/resctrl/mpam_devices.c +++ b/drivers/resctrl/mpam_devices.c@@ -14,6 +14,9 @@
static void mpam_enable_once(void)
{
- mutex_lock(&mpam_list_lock);
- mpam_enable_merge_features(&mpam_classes);
- mutex_unlock(&mpam_list_lock);Can you shift this later in the earlier patch (ordering clearly doesn't matter) so as to reduce churn here?
quoted hunk ↗ jump to hunk
+ int err; /* * Once the cpuhp callbacks have been changed, mpam_partid_max can no@@ -1318,6 +1572,27 @@ static void mpam_enable_once(void) partid_max_published = true; spin_unlock(&partid_max_lock); + /* + * If all the MSC have been probed, enabling the IRQs happens next. + * That involves cross-calling to a CPU that can reach the MSC, and + * the locks must be taken in this order: + */ + cpus_read_lock(); + mutex_lock(&mpam_list_lock); + mpam_enable_merge_features(&mpam_classes); + + err = mpam_register_irqs(); + + mutex_unlock(&mpam_list_lock); + cpus_read_unlock(); + + if (err) { + pr_warn("Failed to register irqs: %d\n", err); + mpam_disable_reason = "Failed to enable."; + schedule_work(&mpam_broken_work); + return; + } + mpam_register_cpuhp_callbacks(mpam_cpu_online, mpam_cpu_offline, "mpam:online");@@ -1385,6 +1660,8 @@ void mpam_disable(struct work_struct *ignored) } mutex_unlock(&mpam_cpuhp_state_lock); + mpam_unregister_irqs(); + idx = srcu_read_lock(&mpam_srcu); list_for_each_entry_srcu(class, &mpam_classes, classes_list, srcu_read_lock_held(&mpam_srcu))