Re: [PATCH 1/3] clk: amlogic: Fix out-of-range PLL frequency setting
From: Jerome Brunet <jbrunet@baylibre.com>
Date: 2025-10-22 11:57:42
Also in:
linux-amlogic, linux-clk, lkml
On Wed 22 Oct 2025 at 14:58, Chuan Liu via B4 Relay [off-list ref] wrote:
From: Chuan Liu <redacted> meson_clk_get_pll_range_index incorrectly determines the maximum value of 'm'.
This explanation is little light ! How did the problem show up ? Under which condition ? How did you come this conclusion ? Other people having problems might benefit from the explanation
quoted hunk
Fixes: 8eed1db1adec6 ("clk: meson: pll: update driver for the g12a") Signed-off-by: Chuan Liu <redacted> --- drivers/clk/meson/clk-pll.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c index 1ea6579a760f..b07e1eb19d12 100644 --- a/drivers/clk/meson/clk-pll.c +++ b/drivers/clk/meson/clk-pll.c@@ -191,7 +191,7 @@ static int meson_clk_get_pll_range_index(unsigned long rate, *m = meson_clk_get_pll_range_m(rate, parent_rate, *n, pll); /* the pre-divider gives a multiplier too big - stop */ - if (*m >= (1 << pll->m.width)) + if (*m > pll->range->max)
Making sure m does not exceed the maximum value is valid too. You should check both conditions then
return -EINVAL; return 0;
-- Jerome