Re: [PATCH 2/2] ARM: dts: aspeed: add asrock x470d4u bmc
From: Krzysztof Kozlowski <krzk@kernel.org>
Date: 2025-10-12 03:03:08
Also in:
linux-aspeed, linux-devicetree, lkml
On 23/09/2025 16:48, Tan Siewert wrote:
On 22.09.25 22:07, Rob Herring wrote:quoted
On Fri, Sep 19, 2025 at 08:56:18PM +0200, Tan Siewert wrote:quoted
The ASRock Rack X470D4U X470D4U is a single-socket X470-based microATX motherboard for Ryzen processors with an AST2500 BMC and either 32MB or 64MB SPI flash. This mainboard exists in three known "flavors" which only differ in the used host NIC, the BMC SPI size and some parts that may be un-populated. To keep the complexity low with the BMC SPI, use the 32MB layout regardless of the used SPI or mainboard flavor. Signed-off-by: Tan Siewert <redacted> --- arch/arm/boot/dts/aspeed/Makefile | 1 + .../dts/aspeed/aspeed-bmc-asrock-x470d4u.dts | 345 ++++++++++++++++++ 2 files changed, 346 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x470d4u.dtsdiff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile index aba7451ab749..fae97b5183e5 100644 --- a/arch/arm/boot/dts/aspeed/Makefile +++ b/arch/arm/boot/dts/aspeed/Makefile@@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-asrock-e3c256d4i.dtb \ aspeed-bmc-asrock-romed8hm3.dtb \ aspeed-bmc-asrock-spc621d8hm3.dtb \ + aspeed-bmc-asrock-x470d4u.dtb \ aspeed-bmc-asrock-x570d4u.dtb \ aspeed-bmc-asus-x4tf.dtb \ aspeed-bmc-bytedance-g220a.dtb \diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x470d4u.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x470d4u.dts new file mode 100644 index 000000000000..bae2b521f708 --- /dev/null +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x470d4u.dts@@ -0,0 +1,345 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +#include "aspeed-g5.dtsi" +#include <dt-bindings/gpio/aspeed-gpio.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + model = "Asrock Rack X470D4U-series BMC"; + compatible = "asrock,x470d4u-bmc", "aspeed,ast2500"; + + aliases { + serial4 = &uart5; + }; + + chosen { + stdout-path = &uart5; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>, + <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>, + <&adc 10>, <&adc 11>, <&adc 12>; + }; + + leds { + compatible = "gpio-leds"; + + heartbeat {led-0I guess `led-heartbeat` would be fine too, right?quoted
This should have given you a warning. You did run "make dtbs_check" check the warnings, right?I did and there were no warnings, even after a full clean. The full command I ran before submitting was `make dtbs_check W=1 DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml`
This is not the command to run. You run `make dtbs_check W=1`. See my slides from OSSEU for introduction to Devicetree. Best regards, Krzysztof