Re: [PATCH 2/4] arm64: dts: qcom: qcs8300: Add CCI definitions
From: Konrad Dybcio <hidden>
Date: 2025-10-08 10:04:54
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linux-arm-msm, linux-devicetree, linux-media, lkml
On 9/9/25 1:42 PM, Vikram Sharma wrote:
quoted hunk ↗ jump to hunk
From: Nihal Kumar Gupta <redacted> Add support for three Camera Control Interface (CCI) controllers on the Qualcomm QCS8300 SoC. Configure clocks, power domains, pinctrl states and two I2C buses (i2c0, i2c1) with 1 MHz frequency. Nodes are added in a disabled state by default. Co-developed-by: Ravi Shankar <redacted> Signed-off-by: Ravi Shankar <redacted> Co-developed-by: Vishal Verma <redacted> Signed-off-by: Vishal Verma <redacted> Co-developed-by: Suresh Vankadara <redacted> Signed-off-by: Suresh Vankadara <redacted> Signed-off-by: Nihal Kumar Gupta <redacted> Signed-off-by: Vikram Sharma <redacted> --- arch/arm64/boot/dts/qcom/qcs8300.dtsi | 309 ++++++++++++++++++++++++++ 1 file changed, 309 insertions(+)diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi index a248e269d72d..a69719e291ea 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi@@ -4681,6 +4681,123 @@ videocc: clock-controller@abf0000 { #power-domain-cells = <1>; }; + cci0: cci@ac13000 { + compatible = "qcom,qcs8300-cci", "qcom,msm8996-cci"; + reg = <0x0 0x0ac13000 0x0 0x1000>; + + interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>,
Does CCI really require all three of these clocks? AXI turned out not to be necessary on at least some platforms Konrad