Re: [PATCH v3 2/2] arm64: dts: imx95: Describe Mali G310 GPU
From: Frank Li <Frank.li@nxp.com>
Date: 2025-09-25 21:34:16
Also in:
dri-devel, imx, linux-devicetree
On Thu, Sep 25, 2025 at 10:38:31PM +0200, Marek Vasut wrote:
The instance of the GPU populated in i.MX95 is the G310, describe this GPU in the DT. Include dummy GPU voltage regulator and OPP tables. Signed-off-by: Marek Vasut <redacted> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
quoted hunk ↗ jump to hunk
Cc: Boris Brezillon <boris.brezillon@collabora.com> Cc: Conor Dooley <conor+dt@kernel.org> Cc: David Airlie <airlied@gmail.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Jiyu Yang (OSS) <redacted> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Rob Herring <robh@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Sebastian Reichel <sre@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Simona Vetter <simona@ffwll.ch> Cc: Steven Price <steven.price@arm.com> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: Xianzhong Li <redacted> Cc: devicetree@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: imx@lists.linux.dev Cc: linux-arm-kernel@lists.infradead.org --- V2: - Drop regulator-{always,boot}-on from fixed-gpu-reg regulator - Keep the GPU and GPUMIX always enabled - Switch from fsl, to nxp, vendor prefix - Fix opp_table to opp-table - Describe IMX95_CLK_GPUAPB as coregroup clock - Sort interrupts by their names to match bindings V3: - Drop perf power domain - Drop reset block controller --- arch/arm64/boot/dts/freescale/imx95.dtsi | 45 ++++++++++++++++++++++++ 1 file changed, 45 insertions(+)diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi index 1292677cbe4eb..ad47b7f0d173a 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi@@ -250,6 +250,35 @@ dummy: clock-dummy { clock-output-names = "dummy"; }; + gpu_fixed_reg: fixed-gpu-reg { + compatible = "regulator-fixed"; + regulator-min-microvolt = <920000>; + regulator-max-microvolt = <920000>; + regulator-name = "vdd_gpu"; + }; + + gpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-hz-real = /bits/ 64 <500000000>; + opp-microvolt = <920000>; + }; + + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-hz-real = /bits/ 64 <800000000>; + opp-microvolt = <920000>; + }; + + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-hz-real = /bits/ 64 <1000000000>; + opp-microvolt = <920000>; + }; + }; + clk_ext1: clock-ext1 { compatible = "fixed-clock"; #clock-cells = <0>;@@ -2138,6 +2167,22 @@ netc_emdio: mdio@0,0 { }; }; + gpu: gpu@4d900000 { + compatible = "nxp,imx95-mali", "arm,mali-valhall-csf"; + reg = <0 0x4d900000 0 0x480000>; + clocks = <&scmi_clk IMX95_CLK_GPU>, <&scmi_clk IMX95_CLK_GPUAPB>; + clock-names = "core", "coregroup"; + interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "job", "mmu", "gpu"; + mali-supply = <&gpu_fixed_reg>; + operating-points-v2 = <&gpu_opp_table>; + power-domains = <&scmi_devpd IMX95_PD_GPU>; + #cooling-cells = <2>; + dynamic-power-coefficient = <1013>; + }; + ddr-pmu@4e090dc0 { compatible = "fsl,imx95-ddr-pmu", "fsl,imx93-ddr-pmu"; reg = <0x0 0x4e090dc0 0x0 0x200>; --2.51.0