Thread (12 messages) 12 messages, 4 authors, 2025-09-18

Re: [PATCH v4 4/5] arm64: dts: renesas: Add R8A78000 X5H DTs

From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: 2025-09-17 15:14:10
Also in: linux-devicetree, linux-perf-users, linux-renesas-soc

Hi Morimoto-san,

On Wed, 17 Sept 2025 at 07:31, Kuninori Morimoto
[off-list ref] wrote:
From: Hai Pham <redacted>

Add initial DT support for R8A78000 (R-Car X5H) SoC.

[Kuninori: tidyup for upstreaming]

Signed-off-by: Hai Pham <redacted>
Signed-off-by: Vinh Nguyen <redacted>
Signed-off-by: Minh Le <redacted>
Signed-off-by: Huy Bui <redacted>
Signed-off-by: Khanh Le <redacted>
Signed-off-by: Phong Hoang <redacted>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Thanks for the update!
quoted hunk ↗ jump to hunk
index 0000000000000..6445f05de0563
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a78000.dtsi
@@ -0,0 +1,755 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the R-Car X5H (R8A78000) SoC
+ *
+ * Copyright (C) 2025 Renesas Electronics Corp.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+       compatible = "renesas,r8a78000";
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       cpus {
+               a720_0: cpu@0 {
+                       compatible = "arm,cortex-a720ae";
+                       reg = <0x0 0x0>;
+                       device_type = "cpu";
+                       next-level-cache = <&L2_CA720_0>;
+
+                       L2_CA720_0: cache-controller {
As reported before, the cache nodes should be outside the CPU nodes.

"make dtbs_check" would have reminded you:

    arch/arm64/boot/dts/renesas/r8a78000-ironhide.dtb: cpu@0
(arm,cortex-a720ae): Unevaluated properties are not allowed
('cache-controller' was unexpected)
            from schema $id: http://devicetree.org/schemas/arm/cpus.yaml#
+                               compatible = "cache";
+                               cache-level = <2>;
Missing "cache-unified".

"make dtbs_check":

    arm64/boot/dts/renesas/r8a78000-ironhide.dtb: cache-controller
(cache): 'cache-unified' is a required property
            from schema $id: http://devicetree.org/schemas/cache.yaml#
+                               next-level-cache = <&L3_CA720_0>;
+                       };
+               };
+       soc: soc {
+               compatible = "simple-bus";
+               interrupt-parent = <&gic>;
Marc asked to move interrupt-parent to the top, i.e. one level up...
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               timer {
... and please keep the timer node outside the soc node.

"make dtbs_check":

    arch/arm64/boot/dts/renesas/r8a78000-ironhide.dtb: soc
(simple-bus): timer: 'ranges' is a required property
            from schema $id: http://devicetree.org/schemas/simple-bus.yaml#
+                       compatible = "arm,armv8-timer";
+                       interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+                                    <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+                                    <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+                                    <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
+                                    <GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
+                       interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", "hyp-virt";
+               };
+               scif0: serial@c0700000 {
+                       compatible = "renesas,scif-r8a78000", "renesas,scif";
Missing "renesas,rcar-gen5-scif".

"make dtbs_check":

    arch/arm64/boot/dts/renesas/r8a78000-ironhide.dtb: serial@c0700000
(renesas,scif-r8a78000): compatible: 'oneOf' conditional failed, one
must be fixed:
            ...
            ['renesas,scif-r8a78000', 'renesas,scif'] is too short
            ...
            'renesas,rcar-gen5-scif' was expected
            ...
            from schema $id:
http://devicetree.org/schemas/serial/renesas,scif.yaml#
+                       reg = <0 0xc0700000 0 0x40>;
+                       interrupts = <GIC_SPI 4074 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&dummy_clk_sgasyncd16>, <&dummy_clk_sgasyncd16>, <&scif_clk>;
+                       clock-names = "fck", "brg_int", "scif_clk";
+                       status = "disabled";
+               };
+               hscif0: serial@c0710000 {
+                       compatible = "renesas,hscif-r8a78000", "renesas,hscif";
Missing "renesas,rcar-gen5-hscif".

"make dtbs_check":

arch/arm64/boot/dts/renesas/r8a78000-ironhide.dtb: serial@c0710000
(renesas,hscif-r8a78000): compatible: 'oneOf' conditional failed, one
must be fixed:
        ['renesas,hscif-r8a78000', 'renesas,hscif'] is too short
        ...
        'renesas,rcar-gen5-hscif' was expected
        from schema $id:
http://devicetree.org/schemas/serial/renesas,hscif.yaml#
+                       reg = <0 0xc0710000 0 0x60>;
+                       interrupts = <GIC_SPI 4078 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&dummy_clk_sgasyncd4>, <&dummy_clk_sgasyncd4>, <&scif_clk>;
+                       clock-names = "fck", "brg_int", "scif_clk";
+                       status = "disabled";
+               };
Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help