On Sun, 31 Aug 2025 18:48:48 +0800, WeiHao Li wrote:

This series adds MIPI DSI support for the Rockchip RK3368 SoC, enabling
native display connectivity through the MIPI DSI host controller and
PHY. The changes span multiple subsystems, including clock control,
DRM/VOP integration, DSI controller binding, and PHY driver updates.

Key changes:
  - Update the Rockchip MIPI DSI PHY driver to preperly handle RK3368
    phy initialization.
  - Add missing lut_size of vop_data for RK3368.
  - Add missing clock ID SCLK_MIPIDSI_24M to the RK3368 CRU driver,
    which is required for enabling the 24MHz reference clock.
  - Add MIPI DSI node to rk3368.dtsi with correct clocks, resets,
    and register mappings.

[...]

Applied, thanks!

[3/7] dt-bindings: clock: rk3368: Add SCLK_MIPIDSI_24M
      commit: 4a76a0a889cef284327f265f97edc4ff2f3e11cc
[4/7] clk: rockchip: use clock ids for SCLK_MIPIDSI_24M on rk3368
      commit: 77111b2c22ef5b368da5c833175b6f7806b39ccb

Best regards,
-- 
Heiko Stuebner [off-list ref]