Re: [PATCH v5 1/6] PCI: dwc: Remove the L1SS check before putting the link into L2
From: Manivannan Sadhasivam <mani@kernel.org>
Date: 2025-09-20 05:58:29
Also in:
imx, linux-pci, lkml
On Tue, Sep 02, 2025 at 04:01:46PM +0800, Richard Zhu wrote:
Since this L1SS check is just an encapsulation problem, and the ASPM shouldn't leak out here. Remove the L1SS check during L2 entry.
Sorry, I couldnt' decipher this statement. Could you please elaborate? - Mani
quoted hunk ↗ jump to hunk
Fixes: 4774faf854f5 ("PCI: dwc: Implement generic suspend/resume functionality") Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> --- drivers/pci/controller/dwc/pcie-designware-host.c | 8 -------- 1 file changed, 8 deletions(-)diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 952f8594b501..9d46d1f0334b 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c@@ -1005,17 +1005,9 @@ static int dw_pcie_pme_turn_off(struct dw_pcie *pci) int dw_pcie_suspend_noirq(struct dw_pcie *pci) { - u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); u32 val; int ret; - /* - * If L1SS is supported, then do not put the link into L2 as some - * devices such as NVMe expect low resume latency. - */ - if (dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKCTL) & PCI_EXP_LNKCTL_ASPM_L1) - return 0; - if (pci->pp.ops->pme_turn_off) { pci->pp.ops->pme_turn_off(&pci->pp); } else {-- 2.37.1
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