On Wed, 10 Sep 2025 15:54:51 +0200, Sebastian Reichel wrote:

The RK3576 EVB1 has a RTL8211F PHY for each GMAC interface with
a dedicated reset line and the 25MHz clock provided by the SoC.
The current description results in non-working Ethernet as the
clocks are only enabled by the PHY driver, but probing the right
PHY driver currently requires that the PHY ID register can be read
for automatic identification.

[...]

Applied, thanks!

[1/1] arm64: dts: rockchip: Fix network on rk3576 evb1 board
      commit: 843367c7ed196bd0806c8776cba108aaf6923b82

Best regards,
-- 
Heiko Stuebner [off-list ref]