Re: [PATCH 1/3] perf: arm_spe: Add barrier before enabling profiling buffer
From: Will Deacon <will@kernel.org>
Date: 2025-09-08 13:41:45
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On Tue, Jul 01, 2025 at 04:31:57PM +0100, James Clark wrote:
quoted hunk ↗ jump to hunk
DEN0154 states that PMBPTR_EL1 must not be modified while the profiling buffer is enabled. Ensure that enabling the buffer comes after setting PMBPTR_EL1 by inserting an isb(). This only applies to guests for now, but in future versions of the architecture the PE will be allowed to behave in the same way. Fixes: d5d9696b0380 ("drivers/perf: Add support for ARMv8.2 Statistical Profiling Extension") Signed-off-by: James Clark <james.clark@linaro.org> --- drivers/perf/arm_spe_pmu.c | 1 + 1 file changed, 1 insertion(+)diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c index 3efed8839a4e..6235ca7ecd48 100644 --- a/drivers/perf/arm_spe_pmu.c +++ b/drivers/perf/arm_spe_pmu.c@@ -537,6 +537,7 @@ static void arm_spe_perf_aux_output_begin(struct perf_output_handle *handle, limit += (u64)buf->base; base = (u64)buf->base + PERF_IDX2OFF(handle->head, buf); write_sysreg_s(base, SYS_PMBPTR_EL1); + isb();
Hmm. arm_spe_perf_aux_output_begin() is only called in two places: 1. From arm_spe_pmu_start() 2. From arm_spe_pmu_irq_handler() For (1), we know that profiling is disabled by PMSCR_EL1.ExSPE. For (2), we know that profiling is disabled by PMBSR_EL1.S. In both cases, we already have an isb() before enabling profiling again so I don't understand what this additional isb() is achieving. Will