Re: [PATCH 1/2] arm64: dts: rockchip: add GPU powerdomain, opps, and cooling to rk3328
From: Diederik de Haas <hidden>
Date: 2025-09-06 10:45:19
Also in:
linux-devicetree, linux-rockchip, lkml
Hi Christian, On Sat Aug 30, 2025 at 1:51 PM CEST, Christian Hewitt wrote:
From: Alex Bee <redacted> Add GPU powerdomain, opp-table, and cooling map nodes for the Mali GPU on the RK3328 SoC. Opp-table frequencies are sourced from the
I very recently saw a patch somewhere with these changes and wondered why it wouldn't be sent upstream, so thanks for doing exactly that!
quoted hunk ↗ jump to hunk
Signed-off-by: Alex Bee <redacted> Signed-off-by: Christian Hewitt <redacted> --- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 39 +++++++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-)diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 7d992c3c01ce..b99c78ecc4a9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi@@ -331,6 +331,11 @@ power: power-controller { #address-cells = <1>; #size-cells = <0>; + power-domain@RK3328_PD_GPU { + reg = <RK3328_PD_GPU>; + clocks = <&cru ACLK_GPU>; + #power-domain-cells = <0>; + }; power-domain@RK3328_PD_HEVC { reg = <RK3328_PD_HEVC>; clocks = <&cru SCLK_VENC_CORE>;@@ -570,9 +575,13 @@ map0 { <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; contribution = <4096>; }; + map1 { + trip = <&target>; + cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + contribution = <4096>; + }; }; }; - }; tsadc: tsadc@ff250000 {@@ -651,7 +660,35 @@ gpu: gpu@ff300000 { "ppmmu1"; clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; clock-names = "bus", "core"; + operating-points-v2 = <&gpu_opp_table>; + power-domains = <&power RK3328_PD_GPU>; resets = <&cru SRST_GPU_A>; + #cooling-cells = <2>; + }; + + gpu_opp_table: gpu-opp-table {
As noticed by Rob's bot, this node name is incorrect. If you do ``s/gpu-opp-table/opp-table-gpu/`` and move it to above the 'pinctrl' node, then DTB validation succeeds. Cheers, Diederik
+ compatible = "operating-points-v2";
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <1075000>;
+ };
+
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <1075000>;
+ };
+
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <1075000>;
+ };
+
+ opp-500000000 {
+ /* causes stability issues */
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <1150000>;
+ status = "disabled";
+ };
};
h265e_mmu: iommu@ff330200 {Attachments
- signature.asc [application/pgp-signature] 228 bytes