[PATCH 3/4] arm64/sysreg: Add TCR_EL2 register
From: Anshuman Khandual <hidden>
Date: 2025-08-18 04:58:20
Also in:
kvmarm, lkml
Subsystem:
arm64 port (aarch64 architecture), kernel virtual machine for arm64 (kvm/arm64), the rest · Maintainers:
Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton, Linus Torvalds
Add TCR_EL2 register fields as per the latest ARM ARM DDI 0487 7.B in tools sysreg format and drop all the existing redundant macros from the header (arch/arm64/include/asm/kvm_arm.h). While here also drop an explicit sysreg definction SYS_TCR_EL2 from sysreg.h header. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Marc Zyngier <maz@kernel.org> Cc: Oliver Upton <redacted> Cc: Mark Brown <broonie@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: kvmarm@lists.linux.dev Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <redacted> --- arch/arm64/include/asm/kvm_arm.h | 13 ---------- arch/arm64/include/asm/sysreg.h | 1 - arch/arm64/tools/sysreg | 44 ++++++++++++++++++++++++++++++++ 3 files changed, 44 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 560d9cb63413..8994cddef182 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h@@ -107,19 +107,6 @@ #define MPAMHCR_HOST_FLAGS 0 -/* TCR_EL2 Registers bits */ -#define TCR_EL2_DS (1UL << 32) -#define TCR_EL2_RES1 ((1U << 31) | (1 << 23)) -#define TCR_EL2_HPD (1 << 24) -#define TCR_EL2_TBI (1 << 20) -#define TCR_EL2_PS_SHIFT 16 -#define TCR_EL2_PS_MASK (7 << TCR_EL2_PS_SHIFT) -#define TCR_EL2_PS_40B (2 << TCR_EL2_PS_SHIFT) -#define TCR_EL2_TG0_MASK TCR_EL1_TG0_MASK -#define TCR_EL2_SH0_MASK TCR_EL1_SH0_MASK -#define TCR_EL2_ORGN0_MASK TCR_EL1_ORGN0_MASK -#define TCR_EL2_IRGN0_MASK TCR_EL1_IRGN0_MASK -#define TCR_EL2_T0SZ_MASK 0x3f #define TCR_EL2_MASK (TCR_EL2_TG0_MASK | TCR_EL2_SH0_MASK | \ TCR_EL2_ORGN0_MASK | TCR_EL2_IRGN0_MASK)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index ad5c901af229..112d5d0acb50 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h@@ -523,7 +523,6 @@ #define SYS_TTBR0_EL2 sys_reg(3, 4, 2, 0, 0) #define SYS_TTBR1_EL2 sys_reg(3, 4, 2, 0, 1) -#define SYS_TCR_EL2 sys_reg(3, 4, 2, 0, 2) #define SYS_VTTBR_EL2 sys_reg(3, 4, 2, 1, 0) #define SYS_VTCR_EL2 sys_reg(3, 4, 2, 1, 2)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 4bdae8bb11dc..d2b40105eb41 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg@@ -4812,6 +4812,50 @@ Sysreg TCR_EL12 3 5 2 0 2 Mapping TCR_EL1 EndSysreg +Sysreg TCR_EL2 3 4 2 0 2 +Res0 63:34 +Field 33 MTX +Field 32 DS +Res1 31 +Field 30 TCMA +Field 29 TBID +Field 28 HWU62 +Field 27 HWU61 +Field 26 HWU60 +Field 25 HWU59 +Field 24 HPD +Res1 23 +Field 22 HD +Field 21 HA +Field 20 TBI +Res0 19 +Field 18:16 PS +UnsignedEnum 15:14 TG0 + 0b00 4K + 0b01 64K + 0b10 16K +EndEnum +UnsignedEnum 13:12 SH0 + 0b00 NONE + 0b10 OUTER + 0b11 INNER +EndEnum +UnsignedEnum 11:10 ORGN0 + 0b00 NC + 0b01 WBWA + 0b10 WT + 0b11 WBnWA +EndEnum +UnsignedEnum 9:8 IRGN0 + 0b00 NC + 0b01 WBWA + 0b10 WT + 0b11 WBnWA +EndEnum +Res0 7:6 +Field 5:0 T0SZ +EndSysreg + Sysreg TCRALIAS_EL1 3 0 2 7 6 Mapping TCR_EL1 EndSysreg
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2.25.1