On Mon, 28 Jul 2025 10:29:42 +0000, Yao Zi wrote:

Rockchip RK3528 ships a naneng-combphy that operates in either PCIe or
USB 3.0 mode. It has a similar control logic to previous generations of
naneng-combphy but an apparently different register layout.

This series prepares phy-rockchip-naneng-combphy.c for variants with a
different register layout and add RK3528 support.

[...]

Applied, thanks!

[1/6] dt-bindings: soc: rockchip: Add RK3528 pipe-phy GRF syscon
      commit: d7122636eca216ea2876baae45483d17e40a55f6
[2/6] dt-bindings: phy: rockchip: naneng-combphy: Add power-domains property
      commit: 19bb2bfdfa5dc4a912e7e5e3432290204e998ac9
[3/6] dt-bindings: phy: rockchip: naneng-combphy: Add RK3528 variant
      commit: d9e0fd60d8d44b2cabd41f5e370e9d41edffe6e9
[4/6] phy: rockchip: naneng-combphy: Add SoC prefix to register definitions
      commit: 11f1896e60f61ca1948cb7920585a79ce5254c0c
[5/6] phy: rockchip: naneng-combphy: Add RK3528 support
      commit: aee07ee1b97d9a3825e8db609a1c76157218cc59

Best regards,
-- 
~Vinod