This adds a second register range in ti,k3-socinfo. This register
range can also be used to detect silicon revisions.
AM62px SR1.0, SR1.1, and SR1.2 can only be distinguished with GP_SW
registers, so increase maximum items to 2 for reg property and update
the example.
Signed-off-by: Judith Mendez <redacted>
---
.../devicetree/bindings/hwinfo/ti,k3-socinfo.yaml | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml b/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml
index dada28b47ea0..3b656fc0cb5a 100644
--- a/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml
+++ b/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml
@@ -24,7 +24,8 @@ properties:
- const: ti,am654-chipid
reg:
- maxItems: 1
+ maxItems: 2
+ minItems: 1
required:
- compatible@@ -34,7 +35,9 @@ additionalProperties: false
examples:
- |
- chipid@43000014 {
+ chipid@14 {
compatible = "ti,am654-chipid";
- reg = <0x43000014 0x4>;
+ reg = <0x43000014 0x4>,
+ <0x43000230 0x10>;
+ bootph-all;
};--
2.49.0