Re: [PATCH v2 4/8] dt-bindings: mmc: add binding for BST DWCMSHC SDHCI controller
From: Rob Herring <robh@kernel.org>
Date: 2025-07-02 14:23:22
Also in:
linux-devicetree, linux-mmc, lkml
On Wed, Jul 02, 2025 at 05:44:40PM +0800, Albert Yang wrote:
quoted hunk ↗ jump to hunk
Add device tree binding documentation for the Black Sesame Technologies (BST) DWCMSHC SDHCI controller. This binding describes the required and optional properties for the bst,dwcmshc-sdhci compatible controller, including register layout, interrupts, bus width, clock configuration, and other controller-specific features. --- Changes for v2: - Simplified description, removed redundant paragraphs - Updated $schema to reference mmc-specific scheme - Corrected compatible to add soc name (bst,c1200-dwcmshc-sdhci) - Removed all redundant property descriptions - Dropped invalid mmc_crm_base/size properties, use reg for all address ranges - Cleaned up required properties to only essential entries - Standardized example DTS format, fixed reg syntax and property ordering - Removed additionalProperties: true Signed-off-by: Ge Gordon <gordon.ge@bst.ai> Signed-off-by: Albert Yang <redacted> --- .../bindings/mmc/bst,dwcmshc-sdhci.yaml | 67 +++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/bst,dwcmshc-sdhci.yamldiff --git a/Documentation/devicetree/bindings/mmc/bst,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/bst,dwcmshc-sdhci.yaml new file mode 100644 index 000000000000..699dc404caac --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/bst,dwcmshc-sdhci.yaml@@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/bst,dwcmshc-sdhci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Black Sesame Technologies DWCMSHC SDHCI Controller + +maintainers: + - Ge Gordon <gordon.ge@bst.ai> + +allOf: + - $ref: mmc-controller.yaml# + +properties: + compatible: + const: bst,c1200-dwcmshc-sdhci + + reg: + maxItems: 2 + description: | + Register base addresses and sizes for the SDHCI controller. + First entry is the core SDHCI registers, second entry is the + CRM registers.
items: - description: Core SDHCI registers - description: CRM registers Though what CRM is should be defined.
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: core
+
+ memory-region:
+ maxItems: 1
+
+ dma-coherent: true
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ mmc@22200000 {
+ compatible = "bst,c1200-dwcmshc-sdhci";
+ reg = <0x0 0x22200000 0x0 0x1000>,
+ <0x0 0x23006000 0x0 0x1000>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_mmc>;
+ clock-names = "core";
+ memory-region = <&mmc0_reserved>;
+ max-frequency = <200000000>;
+ bus-width = <8>;
+ non-removable;
+ dma-coherent;
+ status = "disabled";Examples should be enabled. Drop.
+ }; -- 2.25.1