Hi Vignesh,

On 6/25/25 10:58 PM, Vignesh Raghavendra wrote:

On 25/06/25 03:42, Judith Mendez wrote:

quoted

For eMMC, High Speed DDR mode is not supported [0], so remove
mmc-ddr-1_8v flag which adds the capability.

Needs a Fixes tag.

Ok, will add fixes tag and send in a separate series.

quoted

[0] https://www.ti.com/lit/gpn/am625
Signed-off-by: Judith Mendez <redacted>
---
  arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 1 -
  1 file changed, 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index 9e0b6eee9ac7..120ba8f9dd0e 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi

@@ -553,7 +553,6 @@ sdhci0: mmc@fa10000 {
  		clocks = <&k3_clks 57 5>, <&k3_clks 57 6>;
  		clock-names = "clk_ahb", "clk_xin";
  		bus-width = <8>;
-		mmc-ddr-1_8v;
  		mmc-hs200-1_8v;
  		ti,clkbuf-sel = <0x7>;
  		ti,otap-del-sel-legacy = <0x0>;