On 6/23/25 11:48, Krzysztof Kozlowski wrote:

On 23/06/2025 11:27, Clément Le Goffic wrote:

quoted

DDRPERFM is the DDR Performance Monitor embedded in STM32MPU SoC.
It allows to monitor DDR events that come from the DDR Controller
such as read or write events.

A nit, subject: drop second/last, redundant "bindings". The
"dt-bindings" prefix is already stating that these are bindings.
See also:
https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18

Oops, you're right thank you

quoted

Signed-off-by: Clément Le Goffic <redacted>
---
  .../devicetree/bindings/perf/st,stm32-ddr-pmu.yaml | 93 ++++++++++++++++++++++
  1 file changed, 93 insertions(+)

diff --git a/Documentation/devicetree/bindings/perf/st,stm32-ddr-pmu.yaml b/Documentation/devicetree/bindings/perf/st,stm32-ddr-pmu.yaml
new file mode 100644
index 000000000000..35d34782865b
--- /dev/null
+++ b/Documentation/devicetree/bindings/perf/st,stm32-ddr-pmu.yaml

@@ -0,0 +1,93 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/perf/st,stm32-ddr-pmu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+maintainers:
+  - Clément Le Goffic <clement.legoffic@foss.st.com>
+
+title: STMicroelectronics STM32 DDR Performance Monitor (DDRPERFM)
+
+properties:
+  compatible:
+    enum:
+      - st,stm32mp131-ddr-pmu
+      - st,stm32mp151-ddr-pmu

These are compatible, aren't they?

Yes they are

quoted

+      - st,stm32mp251-ddr-pmu
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    description: Reference clock for the DDR Performance Monitor

Drop description, obvious.

Ok

quoted

+    maxItems: 1
+
+  resets:
+    description: Reset control for the DDR Performance Monitor

Drop description, obvious.

Ok

quoted

+    maxItems: 1
+
+  access-controllers:
+    minItems: 1
+    maxItems: 2
+
+  st,dram-type:
+    description: |
+      This property is used to specify the type of DRAM memory connected to the
+      associated memory controller. It is required for the DDR Performance Monitor
+      to correctly interpret the performance data.
+      0 = LPDDR4,
+      1 = LPDDR3,
+      2 = DDR4,
+      3 = DDR3
+    $ref: /schemas/types.yaml#/definitions/uint32

No, use standard JEDEC memory bindings (memory controllers) if you need
to describe the memory, otherwise you duplicate that binding and
duplicate the memory information.

Ok didn't know about it, I'll take a look

Best regard,
Clément

quoted

+    enum: [0, 1, 2, 3]
+
+required:
+  - compatible
+  - reg
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - st,stm32mp131-ddr-pmu
+              - st,stm32mp151-ddr-pmu
+    then:
+      required:
+        - clocks
+        - resets
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: st,stm32mp251-ddr-pmu
+    then:
+      required:
+        - access-controllers
+        - st,dram-type
+
+additionalProperties: false

Best regards,
Krzysztof