[PATCH 4/4] mmc: mtk-sd: use default PATCH_BIT register values for mt7620
From: Shiji Yang <hidden>
Date: 2025-06-19 05:36:16
Also in:
linux-mediatek, linux-mmc, lkml
Subsystem:
mediatek mmc/sd/sdio driver, multimedia card (mmc), secure digital (sd) and sdio subsystem, the rest · Maintainers:
Chaotian Jing, Ulf Hansson, Linus Torvalds
The register map definitions of these PATCH_BIT registers seem to be slightly different from other variants. Use their default values to respect the vendor SDK driver behaviors. Signed-off-by: Shiji Yang <redacted> --- drivers/mmc/host/mtk-sd.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
index 276d4e324..8933cd089 100644
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c@@ -1939,7 +1939,8 @@ static void msdc_init_hw(struct msdc_host *host) val |= FIELD_PREP(MSDC_CKGEN_MSDC_DLY_SEL, 1); /* First MSDC_PATCH_BIT setup is done: pull the trigger! */ - writel(val, host->base + MSDC_PATCH_BIT); + if (!host->dev_comp->mips_mt762x) + writel(val, host->base + MSDC_PATCH_BIT); /* Set wr data, crc status, cmd response turnaround period for UHS104 */ pb1_val = FIELD_PREP(MSDC_PB1_WRDAT_CRC_TACNTR, 1);
@@ -2002,8 +2003,10 @@ static void msdc_init_hw(struct msdc_host *host) pb2_val |= MSDC_PB2_SUPPORT_64G; /* Patch Bit 1/2 setup is done: pull the trigger! */ - writel(pb1_val, host->base + MSDC_PATCH_BIT1); - writel(pb2_val, host->base + MSDC_PATCH_BIT2); + if (!host->dev_comp->mips_mt762x) { + writel(pb1_val, host->base + MSDC_PATCH_BIT1); + writel(pb2_val, host->base + MSDC_PATCH_BIT2); + } sdr_set_bits(host->base + EMMC50_CFG0, EMMC50_CFG_CFCSTS_SEL); if (host->dev_comp->data_tune) {
--
2.50.0