[PATCH v2 9/9] arm64: dts: apple: t8015: Add I2C nodes
From: Nick Chan <hidden>
Date: 2025-06-10 13:46:22
Also in:
asahi, linux-devicetree, linux-i2c, lkml
Subsystem:
arm/apple machine support, the rest · Maintainers:
Sven Peter, Janne Grunau, Linus Torvalds
Add I2C nodes for Apple A11 SoC. Signed-off-by: Nick Chan <redacted> --- arch/arm64/boot/dts/apple/t8015.dtsi | 76 ++++++++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+)
diff --git a/arch/arm64/boot/dts/apple/t8015.dtsi b/arch/arm64/boot/dts/apple/t8015.dtsi
index 12acf8fc8bc6bcde6b11773cadd97e9ee115f510..e002ecee339013194537910db2168c143ab3d00a 100644
--- a/arch/arm64/boot/dts/apple/t8015.dtsi
+++ b/arch/arm64/boot/dts/apple/t8015.dtsi@@ -265,6 +265,62 @@ cpufreq_p: performance-controller@208ea0000 { #performance-domain-cells = <0>; }; + i2c0: i2c@22e200000 { + compatible = "apple,t8015-i2c", "apple,i2c"; + reg = <0x2 0x2e200000 0x0 0x1000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = <AIC_IRQ 304 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c@22e204000 { + compatible = "apple,t8015-i2c", "apple,i2c"; + reg = <0x2 0x2e204000 0x0 0x1000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = <AIC_IRQ 305 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@22e208000 { + compatible = "apple,t8015-i2c", "apple,i2c"; + reg = <0x2 0x2e208000 0x0 0x1000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = <AIC_IRQ 306 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c2>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c3: i2c@22e20c000 { + compatible = "apple,t8015-i2c", "apple,i2c"; + reg = <0x2 0x2e20c000 0x0 0x1000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = <AIC_IRQ 307 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c3>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + serial0: serial@22e600000 { compatible = "apple,s5l-uart"; reg = <0x2 0x2e600000 0x0 0x4000>;
@@ -321,6 +377,26 @@ pinctrl_ap: pinctrl@233100000 { <AIC_IRQ 54 IRQ_TYPE_LEVEL_HIGH>, <AIC_IRQ 55 IRQ_TYPE_LEVEL_HIGH>, <AIC_IRQ 56 IRQ_TYPE_LEVEL_HIGH>; + + i2c0_pins: i2c0-pins { + pinmux = <APPLE_PINMUX(73, 1)>, + <APPLE_PINMUX(72, 1)>; + }; + + i2c1_pins: i2c1-pins { + pinmux = <APPLE_PINMUX(182, 1)>, + <APPLE_PINMUX(181, 1)>; + }; + + i2c2_pins: i2c2-pins { + pinmux = <APPLE_PINMUX(4, 1)>, + <APPLE_PINMUX(3, 1)>; + }; + + i2c3_pins: i2c3-pins { + pinmux = <APPLE_PINMUX(184, 1)>, + <APPLE_PINMUX(183, 1)>; + }; }; pinctrl_aop: pinctrl@2340f0000 {
--
2.49.0