Re: [PATCH hyperv-next v5 07/11] dt-bindings: microsoft,vmbus: Add interrupts and DMA coherence
From: Roman Kisel <hidden>
Date: 2025-03-10 21:51:15
Also in:
kvmarm, linux-acpi, linux-arch, linux-devicetree, linux-hyperv, linux-pci, lkml
On 3/10/2025 2:17 PM, Krzysztof Kozlowski wrote:
On 10/03/2025 19:07, Roman Kisel wrote:quoted
It is modeled as a bus in the kernel: https://www.kernel.org/doc/html/latest/virt/hyperv/vmbus.htmlquoted
Please upstream bindings for the bus devices and extend the example here with these devices.The set of synthetic devices that reside on the bus isn't fixed, and they don't require description neither in ACPI nor in DT as the devices negotiate their MMIO regions through the hyperv driver. Perhaps, it is not as much bus as expected by the YAML files.OK, then this is not really a bus from the bindings point of view. It is a device schema which should end with additionalProperties: false. If you have report about that pinctrl-0, it means you have undocumented properties in your DTS. Maybe that's the dma-coherence you mentioned in the commit msg.
Much appreciated! I started reviewing the learning materials you mentioned, and I think I already see where my understanding went sideways: I perceived the example as the central part of the bindings whereas it seems to be just what the name suggests: an example. Yet, the example shall conform to the *schema* iiuc, and that is what the tooling validates. Hopefully, I am starting to be getting what this is all about :) Thanks for your help again! I've worked out what makes (more) sense (to me at least): From 475fb74b49dc4987ca8b9117186941d848f0aacd Mon Sep 17 00:00:00 2001 From: Roman Kisel <redacted> Date: Mon, 10 Mar 2025 14:39:41 -0700 Subject: [PATCH] dt-bindings: microsoft,vmbus: Add interrupt and DMA coherence properties To boot in the VTL mode, VMBus on arm64 needs interrupt description which the binding documentation lacks. The transactions on the bus are DMA coherent which is not mentioned as well. Add the interrupt property and the DMA coherence property to the VMBus binding. Update the example to match that. Fix typos. Signed-off-by: Roman Kisel <redacted> --- .../bindings/bus/microsoft,vmbus.yaml | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/bus/microsoft,vmbus.yaml b/Documentation/devicetree/bindings/bus/microsoft,vmbus.yaml index a8d40c766dcd..b175ad01f219 100644
--- a/Documentation/devicetree/bindings/bus/microsoft,vmbus.yaml
+++ b/Documentation/devicetree/bindings/bus/microsoft,vmbus.yaml@@ -10,8 +10,8 @@ maintainers: - Saurabh Sengar <ssengar@linux.microsoft.com> description: - VMBus is a software bus that implement the protocols for communication - between the root or host OS and guest OSs (virtual machines). + VMBus is a software bus that implements the protocols for communication + between the root or host OS and guest OS'es (virtual machines). properties: compatible:
@@ -25,9 +25,17 @@ properties: '#size-cells': const: 1 + dma-coherent: true + + interrupts: + maxItems: 1 + description: | + This interrupt signals a message from the host. + required: - compatible - ranges + - interrupts - '#address-cells' - '#size-cells'
@@ -35,6 +43,8 @@ additionalProperties: false examples: - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> soc { #address-cells = <2>; #size-cells = <1>;
@@ -49,6 +59,9 @@ examples: #address-cells = <2>; #size-cells = <1>; ranges = <0x0f 0xf0000000 0x0f 0xf0000000 0x10000000>; + dma-coherent; + interrupt-parent = <&gic>; + interrupts = <GIC_PPI 2 IRQ_TYPE_EDGE_RISING>; }; }; };
--
2.43.0
>
> Best regards,
> Krzysztof
--
Thank you,
Roman