-----Original Message-----
From: Krzysztof Kozlowski <krzk@kernel.org>
Sent: Wednesday, March 5, 2025 11:29 PM
To: Wilson Ding <redacted>; linux-kernel@vger.kernel.org;
devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
robh@kernel.org
Cc: andrew@lunn.ch; gregory.clement@bootlin.com;
sebastian.hesselbarth@gmail.com; krzk+dt@kernel.org; conor+dt@kernel.org;
p.zabel@pengutronix.de; Sanghoon Lee [off-list ref];
Geethasowjanya Akula [off-list ref]
Subject: [EXTERNAL] Re: [PATCH v3 3/3] arm64: dts: marvell: cp11x: Add reset
controller node

On 04/03/2025 20:08, Wilson Ding wrote:

quoted

I did consider shrinking the syscon's register address range to make
the reset-controller node to be independent from the syscon node.
However, I found the syscon node is also referred by some devices for
miscellaneous configurations . The reset configuration register
happens to be located in between these registers and clock/GPIO
registers.

quoted

drop offset in your patch or unify everything into 'reg'.

This is exactly what I proposed in v3 patch. Do I misunderstand you?

CP11X_LABEL(swrst): reset-controller@268 {
	compatible = "marvell,armada8k-reset";
	reg = <0x268 0x4>;
	#reset-cells = <1>;
};

I don't see the other device being fixed here. How did you unify them?

This patch series is about the proposal of Armada8K's reset controller
dt-binding. The dt-bindings issues of clock/GPIO controllers have been
there for years. Having to say, it is not just a simple patch to fix it. It
will require to convert the dt-binding document into json schemas as
well as adapt these dt changes in the drivers. So I would suggest to
fixing it in later patches. How do you think about it?

Best regards,
Krzysztof