On Thu 06 Mar 2025 at 17:48, [off-list ref] wrote:

Hi Jerome,

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Thank you for reviewing, and apologies for my late response due to a

holiday.

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On Thu 13 Feb 2025 at 23:17, Martijn van Deventer
[off-list ref] wrote:

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When booting SM1 or G12A boards without a dislay attached to HDMI,
the kernel shows the following warning:

[CRTC:46:meson_crtc] vblank wait timed out
WARNING: CPU: 2 PID: 265 at

drivers/gpu/drm/drm_atomic_helper.c:1682

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drm_atomic_helper_wait_for_vblanks.part.0+0x240/0x264

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CPU: 2 UID: 0 PID: 265 Comm: setfont Tainted: G         C
Tainted: [C]=CRAP
pstate: 60400009 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
pc : drm_atomic_helper_wait_for_vblanks.part.0+0x240/0x264
lr : drm_atomic_helper_wait_for_vblanks.part.0+0x240/0x264
Call trace:
 drm_atomic_helper_wait_for_vblanks.part.0+0x240/0x264
 drm_atomic_helper_commit_tail_rpm+0x84/0xa0
 commit_tail+0xa4/0x18c
 drm_atomic_helper_commit+0x164/0x178
 drm_atomic_commit+0xb4/0xec
 drm_client_modeset_commit_atomic+0x210/0x270
 drm_client_modeset_commit_locked+0x5c/0x188
 drm_fb_helper_pan_display+0xb8/0x1d4
 fb_pan_display+0x7c/0x120
 bit_update_start+0x20/0x48
 fbcon_switch+0x418/0x54c
 el0t_64_sync+0x194/0x198

This happens when the kernel disables the unused clocks.
Sometimes this causes the boot to hang.

By (re)adding the flag CLK_IGNORE_UNUSED to the VCLK2 clocks, these
clocks will not be disabled.

This partially reverts commit b70cb1a21a54 ("clk: meson: g12a:
make VCLK2 and ENCL clock path configurable by CCF").

It looks like DRM needs those clock enabled regardless of connection
status on HDMI. Even with this change applied, you would get the same
problem again if the bootloader does not take of turning the clock on,
which is not a given.

CLK_IGNORE_UNUSED gives not guarantee a clock will be enabled or stay
enabled at any point.

A proper fix to this issue should be done in DRM, IMO.

I know and I totally agree. Unfortunately, I don't have access to any 
vendor
documentation, nor do I have any real knowledge about the DRM/HDMI
subsystem to fix that.

You have identified which clocks are not properly claimed, by what they
are not claimed and even when. 50% of the job is done. Thanks for this.

You're welcome, no problem.

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And I guess if it were as easy as adding a clock to the DT and calling
clk_prepare_enable on it in the probe function, Neil would have done

that

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already.

So, all I can do, for now, is revert to the previous situation when it 
did

work

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for (probably) most boards.

Maybe so, but it does not make this change appropriate. The problem
is the DRM driver which does not enable what it needs to properly
operate. This should be fixed.

I understand. So I guess that is the end of the line for this patch.
Because this patch will not be accepted and if someone else finds the 
time and has the knowledge to fix this the proper way, it will be a 
completely different patch.

Although I, of course, agree with you that it should be fixed properly, 
I find it a bit difficult to accept that if we accidentally break something,
while trying to make things better, we are not allowed to revert it 
because it was already somewhat broken. Resulting in a more broken
situation than before...

Once again, you are encouraged to fix things up ... where fixes are needed.

DRM is hardly immutable. If you don't feel like you can do it on your own,
you can still engage with the other contributors who may know this
better and help you.

On the other hand, I also understand that if you, as a maintainer, allow 
that, chances are it will never see a proper fix. :-)

Cheers!

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Fixes: b70cb1a21a54 ("clk: meson: g12a: make VCLK2 and ENCL clock

path

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configurable by CCF").

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Signed-off-by: Martijn van Deventer <redacted>
---
 drivers/clk/meson/g12a.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index cfffd434e998..1651898658f5 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c

@@ -3234,7 +3234,7 @@ static struct clk_regmap g12a_vclk2_div = {

-- 
Jerome