On Mon, 17 Feb 2025 06:11:41 +0000, Yao Zi wrote:
Similar to previous Rockchip SoCs, reset controller on RK3528 shares
MMIO region with clock controller, combined as CRU. They're represented
as a single node in dt.
For the reset controller, only bindings are included in this series
because it's hard to test the reset controller without support for some
peripherals (e.g. pinctrl). I'd like to first make dt and basic
peripherals available, then submit the driver.
[...]
Applied, thanks!
[1/5] dt-bindings: clock: Document clock and reset unit of RK3528
commit: e0c0a97bc308f71b0934e3637ac545ce65195df0
[2/5] clk: rockchip: Add PLL flag ROCKCHIP_PLL_FIXED_MODE
commit: 651aabc9fb0f354ad2ba5fd06a6011e652447489
[3/5] clk: rockchip: Add clock controller driver for RK3528 SoC
commit: 5d0eb375e6857d270f6376d161ef02a1b7183fa2
[4/5] arm64: dts: rockchip: Add clock generators for RK3528 SoC
commit: 858cdcdd11cf9913756297d3869e4de0f01329ea
[5/5] arm64: dts: rockchip: Add UART clocks for RK3528 SoC
commit: b9454434d0349223418f74fbfa7b902104da9bc5
Best regards,
--
Heiko Stuebner [off-list ref]