This is a friendly reminder for this patch.

-----Original Message-----
From: Alim Akhtar <alim.akhtar@samsung.com>
Sent: Thursday, February 13, 2025 1:56 PM
To: 'Sangwook Shin' <redacted>; krzk@kernel.org; wim@linux-
watchdog.org; linux@roeck-us.net
Cc: linux-arm-kernel@lists.infradead.org; linux-samsung-
soc@vger.kernel.org; linux-watchdog@vger.kernel.org; linux-
kernel@vger.kernel.org; 'Kyunghwan Seo' [off-list ref]
Subject: RE: [PATCH] watchdog: s3c2410_wdt: Fix PMU register bits for
ExynosAutoV920 SoC

Hello Sangwook

quoted

-----Original Message-----
From: Sangwook Shin <redacted>
Sent: Thursday, February 13, 2025 6:11 AM
To: krzk@kernel.org; alim.akhtar@samsung.com; wim@linux-watchdog.org;
linux@roeck-us.net
Cc: linux-arm-kernel@lists.infradead.org; linux-samsung-
soc@vger.kernel.org; linux-watchdog@vger.kernel.org; linux-
kernel@vger.kernel.org; Kyunghwan Seo [off-list ref];
Sangwook Shin [off-list ref]
Subject: [PATCH] watchdog: s3c2410_wdt: Fix PMU register bits for
ExynosAutoV920 SoC

From: Kyunghwan Seo <redacted>

Fix the PMU register bits for the ExynosAutoV920 SoC.
This SoC has different bit information compared to its previous
version, ExynosAutoV9, and we have made the necessary adjustments.

rst_stat_bit:
    - ExynosAutoV920 cl0 : 0
    - ExynosAutoV920 cl1 : 1

cnt_en_bit:
    - ExynosAutoV920 cl0 : 8
    - ExynosAutoV920 cl1 : 8

Signed-off-by: Kyunghwan Seo <redacted>
Signed-off-by: Sangwook Shin <redacted>
---

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>