On 2/18/25 12:23 PM, Jernej Škrabec wrote:

Dne torek, 18. februar 2025 ob 03:06:29 Srednjeevropski standardni čas je Alex Studer napisal(a):

quoted

The sun20i THS (built in CPU thermal sensor) is supported in code, but
was never added to the device tree. So, add it to the device tree,
along with a thermal zone for the CPU.

Signed-off-by: Alex Studer <redacted>
---
 arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 31 +++++++++++++++++++
 .../boot/dts/allwinner/sunxi-d1s-t113.dtsi    | 16 ++++++++++
 2 files changed, 47 insertions(+)

diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
index 6367112e6..bdde82aa8 100644
--- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi

@@ -3,6 +3,8 @@
 
 #define SOC_PERIPHERAL_IRQ(nr)	(nr + 16)
 
+#include <dt-bindings/thermal/thermal.h>

Put above line on top (before SOC_PERIPHERAL_IRQ()).

Will fix in v2.

quoted

+
 #include "sunxi-d1s-t113.dtsi"
 
 / {

@@ -115,4 +117,33 @@ pmu {
 			<0x00000000 0x0000000e 0xffffffff 0xffffffff 0x00010000>,
 			<0x00000000 0x0000000f 0xffffffff 0xffffffff 0x00020000>;
 	};
+
+	thermal-zones {
+		cpu-thermal {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&ths>;
+
+			cooling-maps {
+				map0 {
+					trip = <&cpu_alert>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+
+			trips {
+				cpu_alert: cpu-alert {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
+				cpu-crit {
+					temperature = <100000>;
+					hysteresis = <0>;
+					type = "critical";
+				};

Where do those limits come from?

I took them from the definitions in
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi, which is what I generally
based this patch on. I checked the D1s datasheet and it does specify a
max "Ambient Operating Temperature" of 70 C and a max "Working Junction
Temperature Range" of 110 C. So I could use those, but the dtsi files
for the other sunxi chips don't seem to follow their respective
datasheets, so I wasn't sure what to do here.

quoted

+			};
+		};
+	};
 };

diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
index e4175adb0..fcfcaf06c 100644
--- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi

@@ -426,6 +426,10 @@ sid: efuse@3006000 {
 			reg = <0x3006000 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+
+			ths_calibration: thermal-sensor-calibration@14 {
+				reg = <0x14 0x8>;
+			};
 		};
 
 		crypto: crypto@3040000 {

@@ -934,5 +938,17 @@ rtc: rtc@7090000 {
 			clock-names = "bus", "hosc", "ahb";
 			#clock-cells = <1>;
 		};
+
+		ths: thermal-sensor@2009400 {
+			compatible = "allwinner,sun20i-d1-ths";
+			reg = <0x2009400 0x100>;

Size should be 0x400.

Will fix in v2.

Best regards,
Jernej

Thanks,
Alex

quoted

+			interrupts = <SOC_PERIPHERAL_IRQ(58) IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_THS>;
+			clock-names = "bus";
+			resets = <&ccu RST_BUS_THS>;
+			nvmem-cells = <&ths_calibration>;
+			nvmem-cell-names = "calibration";
+			#thermal-sensor-cells = <0>;
+		};
 	};
 };