[PATCH v14 11/13] dt-bindings: display: vop2: Add missing rockchip,grf property for rk3566/8
From: Andy Yan <hidden>
Date: 2025-02-12 09:36:50
Also in:
dri-devel, linux-devicetree, linux-rockchip, lkml
Subsystem:
drm drivers, drm drivers and misc gpu patches, drm drivers for rockchip, open firmware and flattened device tree bindings, the rest · Maintainers:
David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Sandy Huang, Heiko Stübner, Andy Yan, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
From: Andy Yan <andy.yan@rock-chips.com> The clock polarity of RGB signal output is controlled by GRF, this property is already being used in the current device tree, but forgot to describe it as a required property in the binding file. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Krzysztof Kozlowski <redacted> --- (no changes since v13) Changes in v13: - typo fix - Explain the function of this property. Changes in v12: - Split from patch 10/13 .../devicetree/bindings/display/rockchip/rockchip-vop2.yaml | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml
index a5771edd83b5..083eadcf0588 100644
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml@@ -146,6 +146,9 @@ allOf: rockchip,vop-grf: false rockchip,pmu: false + required: + - rockchip,grf + - if: properties: compatible:
@@ -200,6 +203,7 @@ examples: "dclk_vp1", "dclk_vp2"; power-domains = <&power RK3568_PD_VO>; + rockchip,grf = <&grf>; iommus = <&vop_mmu>; vop_out: ports { #address-cells = <1>;
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2.34.1