[PATCH v2 4/4] arm64: dts: exyno990: enable cmu-peric0/1 clock controller
From: Denzeel Oliva <hidden>
Date: 2025-02-12 00:49:07
Also in:
linux-clk, linux-devicetree, linux-i2c, linux-samsung-soc, lkml
Subsystem:
arm/samsung s3c, s5p and exynos arm architectures, the rest · Maintainers:
Krzysztof Kozlowski, Peter Griffin, Linus Torvalds
Enable the cmu-peric0/1 clock controller. It feeds USI and I2C. Signed-off-by: Denzeel Oliva <redacted> --- arch/arm64/boot/dts/exynos/exynos990.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dts/exynos/exynos990.dtsi
index dd7f99f51..843587b17 100644
--- a/arch/arm64/boot/dts/exynos/exynos990.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi@@ -231,12 +231,34 @@ pinctrl_peric0: pinctrl@10430000 { interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>; }; + cmu_peric0: clock-controller@10400000 { + compatible = "samsung,exynos990-cmu-peric0"; + reg = <0x10400000 0x8000>; + #clock-cells = <1>; + + clocks = <&oscclk>, + <&cmu_top CLK_DOUT_CMU_PERIC0_BUS>, + <&cmu_top CLK_DOUT_CMU_PERIC0_IP>; + clock-names = "oscclk", "bus", "ip"; + }; + pinctrl_peric1: pinctrl@10730000 { compatible = "samsung,exynos990-pinctrl"; reg = <0x10730000 0x1000>; interrupts = <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>; }; + cmu_peric1: clock-controller@10700000 { + compatible = "samsung,exynos990-cmu-peric1"; + reg = <0x10700000 0x8000>; + #clock-cells = <1>; + + clocks = <&oscclk>, + <&cmu_top CLK_DOUT_CMU_PERIC1_BUS>, + <&cmu_top CLK_DOUT_CMU_PERIC1_IP>; + clock-names = "oscclk", "bus", "ip"; + }; + cmu_hsi0: clock-controller@10a00000 { compatible = "samsung,exynos990-cmu-hsi0"; reg = <0x10a00000 0x8000>;
--
2.48.1