Hi Niklas,

On Fri, 3 Jan 2025 at 17:01, Niklas Cassel [off-list ref] wrote:

On Fri, Aug 09, 2024 at 01:06:09PM +0530, Anand Moon wrote:

quoted

Rockchip DWC PCIe driver currently waits for the combo PHY link
(PCIe 3.0, PCIe 2.0, and SATA 3.0) to be established link training
during boot, it also waits for the link to be up, which could consume
several milliseconds during boot.

To optimize boot time, this commit allows asynchronous probing.
This change enables the PCIe link establishment to occur in the
background while other devices are being probed.

Signed-off-by: Anand Moon <redacted>
---
v2: update the commit message to describe the changs.
---

Hello Anand,

I tried this patch.

It gives me the following splat on rock5b (rk3588):

[    1.412108] WARNING: CPU: 5 PID: 59 at kernel/module/kmod.c:143 __request_module+0x1c0/0x298
[    1.412853] Modules linked in:
[    1.413125] CPU: 5 UID: 0 PID: 59 Comm: kworker/u32:1 Not tainted 6.13.0-rc1+ #38
[    1.413781] Hardware name: Radxa ROCK 5B (DT)
[    1.414163] Workqueue: async async_run_entry_fn
[    1.414565] pstate: 60400009 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[    1.415175] pc : __request_module+0x1c0/0x298
[    1.415559] lr : __request_module+0x1bc/0x298
[    1.415943] sp : ffff8000804333f0
[    1.416234] x29: ffff800080433470 x28: ffff42bec2e40000 x27: ffff42bec2e400c8
[    1.416860] x26: ffff42bec1739000 x25: ffffb5bec9400e18 x24: 0000000000000000
[    1.417485] x23: ffffb5bec93e1a90 x22: 0000000000000001 x21: ffffb5bec74298f8
[    1.418111] x20: ffff800080433620 x19: ffff800080433410 x18: 0000000000000006
[    1.418736] x17: 0000000000000000 x16: 0000000000000000 x15: 0000000000000000
[    1.419360] x14: 0000000000000001 x13: 0000000000000000 x12: 0000000000000000
[    1.419985] x11: 0000000000000000 x10: 0000000000000000 x9 : ffffb5bec750b834
[    1.420611] x8 : ffff800080433468 x7 : 0000000000000000 x6 : 0000000000000000
[    1.421235] x5 : 0000000000000000 x4 : 0000000000000000 x3 : 0000000000000030
[    1.421860] x2 : 0000000000000008 x1 : ffffb5bec750b708 x0 : 0000000000000001
[    1.422486] Call trace:
[    1.422701]  __request_module+0x1c0/0x298 (P)
[    1.423086]  __request_module+0x1bc/0x298 (L)
[    1.423471]  phy_request_driver_module+0x120/0x178
[    1.423895]  phy_device_create+0x230/0x250
[    1.424257]  get_phy_device+0x80/0x168
[    1.424588]  mdiobus_scan+0x20/0xa0
[    1.424896]  __mdiobus_register+0x21c/0x460
[    1.425265]  __devm_mdiobus_register+0x78/0xf8
[    1.425657]  rtl_init_one+0x7c8/0x1140
[    1.425989]  local_pci_probe+0x48/0xc0
[    1.426323]  pci_device_probe+0xcc/0x248
[    1.426671]  really_probe+0xc4/0x2d0
[    1.426989]  __driver_probe_device+0x80/0x130
[    1.427374]  driver_probe_device+0x44/0x168
[    1.427745]  __device_attach_driver+0xc0/0x148
[    1.428138]  bus_for_each_drv+0x90/0x100
[    1.428486]  __device_attach+0xa8/0x1a0
[    1.428826]  device_attach+0x1c/0x38
[    1.429143]  pci_bus_add_device+0xb4/0x1e0
[    1.429505]  pci_bus_add_devices+0x48/0xa0
[    1.429867]  pci_bus_add_devices+0x74/0xa0
[    1.430228]  pci_host_probe+0x94/0x100
[    1.430560]  dw_pcie_host_init+0x258/0x720
[    1.430923]  rockchip_pcie_probe+0x2ec/0x510
[    1.431300]  platform_probe+0x70/0xe8
[    1.431623]  really_probe+0xc4/0x2d0
[    1.431940]  __driver_probe_device+0x80/0x130
[    1.432326]  driver_probe_device+0x44/0x168
[    1.432696]  __device_attach_driver+0xc0/0x148
[    1.433089]  bus_for_each_drv+0x90/0x100
[    1.433436]  __device_attach_async_helper+0xbc/0xe8
[    1.433865]  async_run_entry_fn+0x3c/0xf0
[    1.434219]  process_one_work+0x158/0x3c8
[    1.434574]  worker_thread+0x2d4/0x3f8
[    1.434907]  kthread+0x118/0x128
[    1.435193]  ret_from_fork+0x10/0x20


Perhaps we should defer this patch until phylib core has been fixed?

For more info, see:
https://lore.kernel.org/netdev/Z3fJQEVV4ACpvP3L@ryzen/T/#u (local)

Thanks for testing this patch.

This patch should have been tested on hardware that includes all the
relevant controllers,
such as PCI 2.0, PCI 3.0, and the SATA controller.
I will test this patch again on all the Radxa devices I have.

This patch's dependency lies in deferring the probe until the PHY
controller initializes.

CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY=m

To my surprise, we have not enabled mdio on Rock-5B boards.
can you check if these changes work on your end?

-----8<----------8<----------8<----------8<----------8<----------8<-----
alarm@rock-5b:/media/nvme0/mainline/linux-rockchip-6.y-devel$ git diff
   arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts

b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
index c44d001da169..5008a05efd2a 100644

--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts

@@ -155,6 +155,19 @@ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
        };
 };

+&mdio1 {
+       rgmii_phy1: ethernet-phy@1 {
+               /* RTL8211F */
+               compatible = "ethernet-phy-id001c.c916";
+               reg = <0x1>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&rtl8211f_rst>;
+               reset-assert-us = <20000>;
+               reset-deassert-us = <100000>;
+               reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
+       };
+};
+
 &combphy0_ps {
        status = "okay";
 };

@@ -224,6 +237,21 @@ &hdptxphy_hdmi0 {
        status = "okay";
 };

+&gmac1 {
+       clock_in_out = "output";
+       phy-handle = <&rgmii_phy1>;
+       phy-mode = "rgmii";
+       pinctrl-0 = <&gmac1_miim
+                    &gmac1_tx_bus2
+                    &gmac1_rx_bus2
+                    &gmac1_rgmii_clk
+                    &gmac1_rgmii_bus>;
+       pinctrl-names = "default";
+       tx_delay = <0x3a>;
+       rx_delay = <0x3e>;
+       status = "okay";
+};
+
 &i2c0 {
        pinctrl-names = "default";
        pinctrl-0 = <&i2c0m2_xfer>;

@@ -419,6 +447,12 @@ pcie3_vcc3v3_en: pcie3-vcc3v3-en {
                };
        };

+       rtl8211f {
+               rtl8211f_rst: rtl8211f-rst {
+                       rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        usb {
                vcc5v0_host_en: vcc5v0-host-en {
                        rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;

Kind regards,
Niklas

Can you check this on your end

alarm@rock-5b:~$ sudo cat /sys/kernel/debug/devices_deferred
[sudo] password for alarm:
fc400000.usb    dwc3: failed to initialize core
alarm@rock-5b:~$ sudo cat /sys/kernel/debug/devices_deferred

Thanks
-Anand