Hi Will,

Do you have any feedback on this series of patch? All comments have been addressed. 

Thanks,
Gowthami

-----Original Message-----
From: Gowthami Thiagarajan <gthiagarajan@marvell.com>
Sent: Friday, November 8, 2024 9:36 AM
To: will@kernel.org; mark.rutland@arm.com; linux-arm-kernel@lists.infradead.org; linux-
kernel@vger.kernel.org
Cc: Bharat Bhushan <bbhushan2@marvell.com>; George Cherian <gcherian@marvell.com>; Sunil Kovvuri
Goutham [off-list ref]; jonathan.cameron@huawei.com; Gowthami Thiagarajan
[off-list ref]
Subject: [PATCH v10 0/5] Marvell Odyssey uncore performance monitor support

Odyssey is a 64 bit ARM based SoC with multiple performance monitor
units for various blocks.

This series of patches introduces support for uncore performance monitor
units (PMUs) on the Marvell Odyssey platform. The PMUs covered in this
series include the DDR PMU and LLC-TAD PMU.

v9->v10:
- Minor code rearrangement based on the feedback
- Typo fix
- Updated commit description
- Added RB tag to one of the patches

v8->v9:
- Addressed the review comments.
- Added platform specific flag in DDR PMU driver instead of version
  as there is already a platform specific data.

Gowthami Thiagarajan (5):
  perf/marvell: Refactor to extract platform data - no functional change
  perf/marvell: Refactor to extract PMU operations
  perf/marvell: Odyssey DDR Performance monitor support
  perf/marvell : Refactor to extract platform data - no functional
    change
  perf/marvell : Odyssey LLC-TAD performance monitor support

 Documentation/admin-guide/perf/index.rst      |   2 +
 .../admin-guide/perf/mrvl-odyssey-ddr-pmu.rst |  80 +++
 .../admin-guide/perf/mrvl-odyssey-tad-pmu.rst |  37 ++
 drivers/perf/marvell_cn10k_ddr_pmu.c          | 530 +++++++++++++++---
 drivers/perf/marvell_cn10k_tad_pmu.c          |  66 ++-
 5 files changed, 641 insertions(+), 74 deletions(-)
 create mode 100644 Documentation/admin-guide/perf/mrvl-odyssey-ddr-pmu.rst
 create mode 100644 Documentation/admin-guide/perf/mrvl-odyssey-tad-pmu.rst

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