[PATCH 2/3] clk: imx93: Add IMX93_CLK_SPDIF_IPG clock
From: Shengjiu Wang <hidden>
Date: 2024-11-07 10:11:02
Also in:
imx, linux-clk, linux-devicetree, lkml
Subsystem:
common clk framework, nxp i.mx clock drivers, the rest · Maintainers:
Michael Turquette, Stephen Boyd, Abel Vesa, Linus Torvalds
The IMX93_CLK_SPDIF_GATE also controls the gate of IPG clock and root clock, need to define them separately. Otherwise driver disable IMX93_CLK_SPDIF_GATE will cause IPG clock is also disabled, then register accessing fail. Signed-off-by: Shengjiu Wang <redacted> --- drivers/clk/imx/clk-imx93.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index 58a516dd385b..eb818db008fb 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c@@ -15,7 +15,7 @@ #include "clk.h" -#define IMX93_CLK_END 207 +#define IMX93_CLK_END 208 #define PLAT_IMX93 BIT(0) #define PLAT_IMX91 BIT(1)
@@ -38,6 +38,7 @@ static u32 share_count_sai2; static u32 share_count_sai3; static u32 share_count_mub; static u32 share_count_pdm; +static u32 share_count_spdif; static const char * const a55_core_sels[] = {"a55_alt", "arm_pll"}; static const char *parent_names[MAX_SEL][4] = {
@@ -252,7 +253,8 @@ static const struct imx93_clk_ccgr { { IMX93_CLK_MQS1_GATE, "mqs1", "sai1_root", 0x9b00, }, { IMX93_CLK_MQS2_GATE, "mqs2", "sai3_root", 0x9b40, }, { IMX93_CLK_AUD_XCVR_GATE, "aud_xcvr", "audio_xcvr_root", 0x9b80, }, - { IMX93_CLK_SPDIF_GATE, "spdif", "spdif_root", 0x9c00, }, + { IMX93_CLK_SPDIF_IPG, "spdif_ipg_clk", "bus_wakeup_root", 0x9c00, 0, &share_count_spdif}, + { IMX93_CLK_SPDIF_GATE, "spdif", "spdif_root", 0x9c00, 0, &share_count_spdif}, { IMX93_CLK_HSIO_32K_GATE, "hsio_32k", "osc_32k", 0x9dc0, }, { IMX93_CLK_ENET1_GATE, "enet1", "wakeup_axi_root", 0x9e00, 0, NULL, PLAT_IMX93, }, { IMX93_CLK_ENET_QOS_GATE, "enet_qos", "wakeup_axi_root", 0x9e40, 0, NULL, PLAT_IMX93, },
--
2.34.1