Re: [PATCH v4 1/3] dt-bindings: spi: apple,spi: Add binding for Apple SPI controllers
From: Mark Kettenis <hidden>
Date: 2024-11-05 08:41:56
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asahi, linux-devicetree, linux-spi, lkml
From: Janne Grunau via B4 Relay <devnull+j.jannau.net@kernel.org> Date: Tue, 05 Nov 2024 09:08:29 +0100 From: Hector Martin <redacted> The Apple SPI controller is present in SoCs such as the M1 (t8103) and M1 Pro/Max (t600x). This controller uses one IRQ and one clock, and doesn't need any special properties, so the binding is trivial.
Matches what is currently in use for U-Boot and OpenBSD.
Signed-off-by: Hector Martin <redacted> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Nick Chan <redacted> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <redacted>
quoted hunk
--- .../devicetree/bindings/spi/apple,spi.yaml | 62 ++++++++++++++++++++++ 1 file changed, 62 insertions(+)diff --git a/Documentation/devicetree/bindings/spi/apple,spi.yaml b/Documentation/devicetree/bindings/spi/apple,spi.yaml new file mode 100644 index 0000000000000000000000000000000000000000..7bef605a296353a62252282af4ba45a71b20b7b6 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/apple,spi.yaml@@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/apple,spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple ARM SoC SPI controller + +allOf: + - $ref: spi-controller.yaml# + +maintainers: + - Hector Martin <marcan@marcan.st> + +properties: + compatible: + items: + - enum: + - apple,t8103-spi + - apple,t8112-spi + - apple,t6000-spi + - const: apple,spi + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/apple-aic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + spi@39b104000 { + compatible = "apple,t6000-spi", "apple,spi"; + reg = <0x3 0x9b104000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = <AIC_IRQ 0 1107 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk>; + }; + };-- 2.47.0