Re: [PATCH v3 0/2] mmc: host: sdhci-esdhc-imx: implement emmc hardware reset

On 1/11/24 13:42, Josua Mayer wrote:

Signed-off-by: Josua Mayer <redacted>
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Changes in v3:
- reused existing control register definition from sdhci-esdhc.h
  (Reported-by: Bough Chen [off-list ref])
- placed both control register mask definitions next to each other
- fixed timeout write register name
- Link to v2: https://lore.kernel.org/r/20241030-imx-emmc-reset-v2-0-b3a823393974@solid-run.com (local)

Changes in v2:
- replaced udelay with usleep_range
  (Reported-by: Adrian Hunter [off-list ref])
- added comments for delay values
  (Reported-by: Peng Fan [off-list ref])
- delay values based on JEDEC Standard No. 84-B51, 6.15.10 H/W Reset Operation,
  on page 159
  (Thanks to Bough Chen [off-list ref])
- added a second patch demonstrating a cosmetic issue revealed by first
  patch - it bothered me during development but is not important
- Link to v1: https://lore.kernel.org/r/20241027-imx-emmc-reset-v1-1-d5d0c672864a@solid-run.com (local)

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Josua Mayer (2):
      mmc: host: sdhci-esdhc-imx: implement emmc hardware reset
      mmc: host: sdhci-esdhc-imx: update esdhc sysctl dtocv bitmask

For both:

Acked-by: Adrian Hunter <adrian.hunter@intel.com>