[PATCH 2/2] clk: samsung: Fixes PLL locktime for PLL142XX used on FSD platfom
From: Varada Pavani <hidden>
Date: 2024-09-26 15:33:55
Also in:
linux-clk, linux-samsung-soc, lkml, stable
Subsystem:
common clk framework, samsung soc clock drivers, the rest · Maintainers:
Michael Turquette, Stephen Boyd, Krzysztof Kozlowski, Sylwester Nawrocki, Chanwoo Choi, Peter Griffin, Linus Torvalds
Possibly related (same subject, not in this thread)
- 2024-10-01 · RE: [PATCH 2/2] clk: samsung: Fixes PLL locktime for PLL142XX used on FSD platfom · Varada Pavani <hidden>
- 2024-09-30 · Re: [PATCH 2/2] clk: samsung: Fixes PLL locktime for PLL142XX used on FSD platfom · Krzysztof Kozlowski <krzk@kernel.org>
- 2024-09-30 · [PATCH 2/2] clk: samsung: Fixes PLL locktime for PLL142XX used on FSD platfom · Varada Pavani <hidden>
Add PLL locktime for PLL142XX controller.
Fixes: 4f346005aaed ("clk: samsung: fsd: Add initial clock support")
Cc: stable@vger.kernel.org
Signed-off-by: Varada Pavani <redacted>
---
drivers/clk/samsung/clk-pll.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c
index 4be879ab917e..d4c5ae20de4f 100644
--- a/drivers/clk/samsung/clk-pll.c
+++ b/drivers/clk/samsung/clk-pll.c@@ -206,6 +206,7 @@ static const struct clk_ops samsung_pll3000_clk_ops = { */ /* Maximum lock time can be 270 * PDIV cycles */ #define PLL35XX_LOCK_FACTOR (270) +#define PLL142XX_LOCK_FACTOR (150) #define PLL35XX_MDIV_MASK (0x3FF) #define PLL35XX_PDIV_MASK (0x3F)
@@ -272,7 +273,11 @@ static int samsung_pll35xx_set_rate(struct clk_hw *hw, unsigned long drate, } /* Set PLL lock time. */ - writel_relaxed(rate->pdiv * PLL35XX_LOCK_FACTOR, + if (pll->type == pll_142xx) + writel_relaxed(rate->pdiv * PLL142XX_LOCK_FACTOR, + pll->lock_reg); + else + writel_relaxed(rate->pdiv * PLL35XX_LOCK_FACTOR, pll->lock_reg); /* Change PLL PMS values */
--
2.17.1