[PATCH 4/5] arm64: dts: mediatek: mt8188: Add efuse for GPU speed binning
From: Pablo Sun <hidden>
Date: 2024-09-20 13:42:34
Also in:
linux-clk, linux-devicetree, linux-mediatek, lkml
Subsystem:
arm/mediatek soc support, the rest · Maintainers:
Matthias Brugger, AngeloGioacchino Del Regno, Linus Torvalds
The OPP table of mt8188 GPU contains duplicated frequencies for different speed bins. In order to support OPP table, we need to provide the speed bin info in the efuse data so the GPU driver could properly set the supported hardware speed bin. Signed-off-by: Pablo Sun <redacted> --- arch/arm64/boot/dts/mediatek/mt8188.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
index 02a5bb4dbd1f..129edaf33704 100644
--- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi@@ -1752,6 +1752,11 @@ efuse: efuse@11f20000 { lvts_efuse_data1: lvts1-calib@1ac { reg = <0x1ac 0x40>; }; + + gpu_speedbin: gpu-speedbin@580 { + reg = <0x581 0x1>; + bits = <0 3>; + }; }; gpu: gpu@13000000 {
@@ -1763,6 +1768,8 @@ gpu: gpu@13000000 { <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH 0>, <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH 0>; interrupt-names = "job", "mmu", "gpu"; + nvmem-cells = <&gpu_speedbin>; + nvmem-cell-names = "speed-bin"; operating-points-v2 = <&gpu_opp_table>; power-domains = <&spm MT8188_POWER_DOMAIN_MFG2>, <&spm MT8188_POWER_DOMAIN_MFG3>,
--
2.45.2