Re: [PATCH v2 5/8] iommu/arm-smmu-v3: Report IOMMU_CAP_ENFORCE_CACHE_COHERENCY for CANWBS
From: Nicolin Chen <hidden>
Date: 2024-08-27 20:13:59
Also in:
kvm, linux-acpi, linux-iommu, linux-patches
On Tue, Aug 27, 2024 at 12:51:35PM -0300, Jason Gunthorpe wrote:
HW with CANWBS is always cache coherent and ignores PCI No Snoop requests as well. This meets the requirement for IOMMU_CAP_ENFORCE_CACHE_COHERENCY, so let's return it. Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Nicolin Chen <redacted> With two very ignorable nits:
quoted hunk ↗ jump to hunk
@@ -2693,6 +2718,15 @@ static int arm_smmu_attach_prepare(struct arm_smmu_attach_state *state, * one of them. */ spin_lock_irqsave(&smmu_domain->devices_lock, flags); + if (smmu_domain->enforce_cache_coherency && + !(dev_iommu_fwspec_get(master->dev)->flags & + IOMMU_FWSPEC_PCI_RC_CANWBS)) {
How about a small dev_enforce_cache_coherency() helper?
+ kfree(master_domain); + spin_unlock_irqrestore(&smmu_domain->devices_lock, + flags); + return -EINVAL;
kfree() doesn't need to be locked. Thanks Nicolin