On Wed, Aug 14, 2024 at 02:40:10AM +0300, Laurent Pinchart wrote:

The DT nodes for the MIPI CSI-2 receivers (MIPI_CSI) configure the
CAM1_PIX and CAM2_PIX clocks to 266 MHz through the assigned-clock-rates
property, and report that frequency in the clock-frequency property. The
i.MX8MP reference manual and datasheet list 266 MHz as a nominal
frequency when using both CSI-2 receivers, so all looks normal.

In reality, the clock is actually set to 250 MHz, as the selected
parent, IMX8MP_SYS_PLL2_1000M, has a 1/4 output that is selected as the
closest frequency to 266 MHz. This doesn't break operation of the
device, but is clearly misleading.

Clarify the clock configuration by selecting the IMX8MP_SYS_PLL2_250M
parent, dropping the redundant assigned-clock-rates, and setting
clock-frequency to 250 MHz. This doesn't cause any functional change.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

Applied, thanks!