On Tue, 27 Aug 2024, Frank Li wrote:

On Tue, Aug 27, 2024 at 12:05:24PM +1000, David Leonard wrote:

quoted

Add QorIQ LS1012A pinctrl driver, allowing i2c-core to exert
GPIO control over the second I2C bus.

Signed-off-by: David Leonard <redacted>
---

Why not use pinctrl-single ?

You can ref arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi

It did similar thing to use GPIO recover i2c bus.

Just need change dts file.

This is a great suggestion for the LS1046A and means I could
withdraw the "fsl,ls1046a-pinctrl" driver, which I'll do.

But I don't think it's suitable for use with the LS1012A.
The reason is that the the LS1012A's pinmux register PMUXCR0 is more
complicated. It has a global override bit, overriding the "backing"
RCW configuration for 3 pingroups. In addition, when overriding, the
PMUXCR0 can only supply a subset of the functions that RCW can.

/*
  * LS1012A
  *    Group: qspi_1             qspi_2      qspi_3
  *           ================== =========== =============
  *    Pin:   62    123    124   61          122    60
  *           ----- ------ ----- ----------- ------ ------
  * i2c                                      SCL    SDA    (RCW only)
  * spi       SCK   DATA0
  * spi       SCK   DATA0        DATA1
  * spi       SCK   DATA0        DATA1       DATA2  DATA3
  * gpio      GPIO4 GPIO11 GPIO5
  * gpio                         GPIO12
  * gpio                                     GPIO13 GPIO14
  * gpio_reset                               GPIO13 REQ_B  (RCW only)
  */

In particular, when PMUXCR0 is overriding RCW, it can't provide "i2c"
or "gpio_reset" functions for qspi_3. It can only provide "spi" and "gpio".

The fsl,ls1012a-pinctrl driver recognises when you are asking
for the configuration that the RCW can provide, and diables the
override.

Cheers,

David