Thread (60 messages) 60 messages, 7 authors, 2024-09-12

Re: [PATCH v6 05/13] PCI: brcmstb: Use bridge reset if available

From: Jim Quinlan <hidden>
Date: 2024-08-19 18:09:59
Also in: linux-pci, lkml

On Sat, Aug 17, 2024 at 1:41 PM Stanimir Varbanov [off-list ref] wrote:
Hi Jim,

On 8/16/24 01:57, Jim Quinlan wrote:
quoted
The 7712 SOC has a bridge reset which can be described in the device tree.
Use it if present.  Otherwise, continue to use the legacy method to reset
the bridge.

Signed-off-by: Jim Quinlan <redacted>
---
 drivers/pci/controller/pcie-brcmstb.c | 24 +++++++++++++++++++-----
 1 file changed, 19 insertions(+), 5 deletions(-)
Reviewed-by: Stanimir Varbanov <redacted>

One problem though on RPi5 (bcm2712).

With this series applied + my WIP patches for enablement of PCIe on
bcm2712 when enable the pcie1 and pcie2 root ports in dts, I see kernel
boot stuck on pcie2 enumeration and I have to add this [1] to make it
work again.

Some more info about resets used:

pcie0 @ 100000:
        resets = <&bcm_reset 5>, <&bcm_reset 42>, <&pcie_rescal>;
        reset-names = "swinit", "bridge", "rescal";

pcie1 @ 110000:
        resets = <&bcm_reset 7>, <&bcm_reset 43>, <&pcie_rescal>;
        reset-names = "swinit", "bridge", "rescal";

pcie2 @ 120000:
        resets = <&bcm_reset 9>, <&bcm_reset 44>, <&pcie_rescal>;
        reset-names = "swinit", "bridge", "rescal";


I changed "swinit" reset for pcie2 to <&bcm_reset 9> (it is 32 in
downstream rpi kernel) because otherwise I'm unable to enumerate RP1
south bridge at all.

Any help will be appreciated.
Hi Stan,
Let me look into this.  Why is one of the controllers turning off --
is it not populated with a device?

As you probably know the 7712 only has access to PCIe1.  But we do
have another chip with two controllers and I will try to reproduce
your failure and get to the bottom of it.

Regards,
Jim Quinlan
Broadcom STB/CM
~Stan

[1]
https://github.com/raspberrypi/linux/blob/rpi-6.11.y/drivers/pci/controller/pcie-brcmstb.c#L1711

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