[PATCH 02/13] dt-bindings: clock: exynos7885: Add CMU_TOP PLL MUX indices
From: David Virag <hidden>
Date: 2024-08-04 21:55:13
Also in:
linux-clk, linux-devicetree, linux-phy, linux-samsung-soc, linux-usb, lkml
Subsystem:
common clk framework, open firmware and flattened device tree bindings, samsung soc clock drivers, the rest · Maintainers:
Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Sylwester Nawrocki, Chanwoo Choi, Peter Griffin, Linus Torvalds
Add indices for missing MUX clocks from PLLs in CMU_TOP. Signed-off-by: David Virag <redacted> --- include/dt-bindings/clock/exynos7885.h | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/include/dt-bindings/clock/exynos7885.h b/include/dt-bindings/clock/exynos7885.h
index 54cfccff8508..4ce86810b10d 100644
--- a/include/dt-bindings/clock/exynos7885.h
+++ b/include/dt-bindings/clock/exynos7885.h@@ -69,6 +69,8 @@ #define CLK_GOUT_FSYS_MMC_EMBD 58 #define CLK_GOUT_FSYS_MMC_SDIO 59 #define CLK_GOUT_FSYS_USB30DRD 60 +#define CLK_MOUT_SHARED0_PLL 61 +#define CLK_MOUT_SHARED1_PLL 62 /* CMU_CORE */ #define CLK_MOUT_CORE_BUS_USER 1
--
2.46.0