[PATCH v2 17/30] irqchip/armada-370-xp: Don't read number of supported interrupts multiple times
From: Marek Behún <kabel@kernel.org>
Date: 2024-07-02 11:46:26
Subsystem:
arm/marvell kirkwood and armada 370, 375, 38x, 39x, xp, 3700, 7k/8k, cn9130 soc support, irqchip drivers, the rest · Maintainers:
Andrew Lunn, Gregory Clement, Sebastian Hesselbarth, Thomas Gleixner, Linus Torvalds
Get the number of supported interrupts, originally from the MPIC_INT_CONTROL register, from the mpic_domain structure member when it is already initialized. Signed-off-by: Marek Behún <kabel@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> --- drivers/irqchip/irq-armada-370-xp.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-)
diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index ab18dae174a8..151f0fd0389a 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c@@ -508,13 +508,7 @@ static int mpic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, static void mpic_smp_cpu_init(void) { - u32 control; - int nr_irqs; - - control = readl(main_int_base + MPIC_INT_CONTROL); - nr_irqs = (control >> 2) & 0x3ff; - - for (int i = 0; i < nr_irqs; i++) + for (int i = 0; i < mpic_domain->hwirq_max; i++) writel(i, per_cpu_int_base + MPIC_INT_SET_MASK); if (!mpic_is_ipi_available())
@@ -723,11 +717,9 @@ static int mpic_suspend(void) static void mpic_resume(void) { bool src0, src1; - int nirqs; /* Re-enable interrupts */ - nirqs = (readl(main_int_base + MPIC_INT_CONTROL) >> 2) & 0x3ff; - for (irq_hw_number_t irq = 0; irq < nirqs; irq++) { + for (irq_hw_number_t irq = 0; irq < mpic_domain->hwirq_max; irq++) { struct irq_data *data; unsigned int virq;
--
2.44.2