Re: [PATCH 5/7] arm64: dts: broadcom: bcm2712: Add one more GPIO node

Add GPIO and related interrupt controller nodes and wire one
of the lines to power button.

Signed-off-by: Ivan T. Ivanov <redacted>
---
  .../boot/dts/broadcom/bcm2712-rpi-5-b.dts     | 21 +++++++++++++++++++
  arch/arm64/boot/dts/broadcom/bcm2712.dtsi     | 21 +++++++++++++++++++
  2 files changed, 42 insertions(+)

diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
index 8a0d20afebfe..06e926af16b7 100644
--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts

@@ -2,6 +2,7 @@
  /dts-v1/;
  
  #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
  #include "bcm2712.dtsi"
  
  / {

@@ -44,6 +45,21 @@ sd_vcc_reg: sd-vcc-reg {
  		enable-active-high;
  		gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>;
  	};
+
+	pwr-button {
+		compatible = "gpio-keys";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwr_button_pins>;
+		status = "okay";
+
+		pwr_key: pwr {
+			label = "pwr_button";
+			linux,code = <KEY_POWER>;
+			gpios = <&gio 20 GPIO_ACTIVE_LOW>;
+			debounce-interval = <50>;
+		};
+	};
  };
  
  /* The system UART */

@@ -73,6 +89,11 @@ emmc_aon_cd_pins: emmc-aon-cd-pins {
  };
  
  &pinctrl {
+	pwr_button_pins: pwr-button-pins {
+		function = "gpio";
+		pins = "gpio20";
+		bias-pull-up;
+	};
  
  	emmc_sd_pulls: emmc-sd-pulls {
  		pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3";

diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
index 1099171cd435..39d2419ffce2 100644
--- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi

@@ -271,6 +271,27 @@ pinctrl: pinctrl@7d504100 {
  			reg = <0x7d504100 0x30>;
  		};
  
+		main_irq: intc@7d508400 {
+			compatible = "brcm,bcm7271-l2-intc";
+			reg = <0x7d508400 0x10>;
+			interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+		};
+
+		gio: gpio@7d508500 {
+			compatible = "brcm,brcmstb-gpio";
+			reg = <0x7d508500 0x40>;
+			interrupt-parent = <&main_irq>;
+			interrupts = <0>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			brcm,gpio-bank-widths = <32 22>;
+			brcm,gpio-direct;