[PATCH v3 10/11] KVM: arm64: Do not perform an isb() if ZCR_EL2 isn't updated
From: Fuad Tabba <hidden>
Date: 2024-05-28 13:01:41
Also in:
kvmarm
Subsystem:
arm64 port (aarch64 architecture), kernel virtual machine for arm64 (kvm/arm64), the rest · Maintainers:
Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton, Linus Torvalds
When conditionally updating ZCR, no need to perform an isb() if the value isn't updated. Introduce and use sve_cond_update_zcr_vq_isb(), which only has the barrier if the value of ZCR is updated. Signed-off-by: Fuad Tabba <redacted> --- This patch is undone by the following patch. Please consider one of these two patches, or feel free to drop both. --- arch/arm64/include/asm/fpsimd.h | 14 ++++++++++++-- arch/arm64/kvm/hyp/include/hyp/switch.h | 3 +-- arch/arm64/kvm/hyp/nvhe/hyp-main.c | 3 +-- 3 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
index bc69ac368d73..531f805e4643 100644
--- a/arch/arm64/include/asm/fpsimd.h
+++ b/arch/arm64/include/asm/fpsimd.h@@ -219,15 +219,24 @@ static inline void sve_user_enable(void) sysreg_clear_set(cpacr_el1, 0, CPACR_EL1_ZEN_EL0EN); } -#define sve_cond_update_zcr_vq(val, reg) \ +#define __sve_cond_update_zcr_vq(val, reg, sync) \ do { \ u64 __zcr = read_sysreg_s((reg)); \ u64 __new = __zcr & ~ZCR_ELx_LEN_MASK; \ __new |= (val) & ZCR_ELx_LEN_MASK; \ - if (__zcr != __new) \ + if (__zcr != __new) { \ write_sysreg_s(__new, (reg)); \ + if (sync) \ + isb(); \ + } \ } while (0) +#define sve_cond_update_zcr_vq(val, reg) \ + __sve_cond_update_zcr_vq(val, reg, false) + +#define sve_cond_update_zcr_vq_isb(val, reg) \ + __sve_cond_update_zcr_vq(val, reg, true) + /* * Probing and setup functions. * Calls to these functions must be serialised with one another.
@@ -330,6 +339,7 @@ static inline void sve_user_disable(void) { BUILD_BUG(); } static inline void sve_user_enable(void) { BUILD_BUG(); } #define sve_cond_update_zcr_vq(val, reg) do { } while (0) +#define sve_cond_update_zcr_vq_isb(val, reg) do { } while (0) static inline void vec_init_vq_map(enum vec_type t) { } static inline void vec_update_vq_map(enum vec_type t) { }
diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h
index 24b43f1f3d51..162a60bcc27d 100644
--- a/arch/arm64/kvm/hyp/include/hyp/switch.h
+++ b/arch/arm64/kvm/hyp/include/hyp/switch.h@@ -314,8 +314,7 @@ static bool kvm_hyp_handle_mops(struct kvm_vcpu *vcpu, u64 *exit_code) static inline void __hyp_sve_restore_guest(struct kvm_vcpu *vcpu) { - sve_cond_update_zcr_vq(vcpu_sve_max_vq(vcpu) - 1, SYS_ZCR_EL2); - isb(); + sve_cond_update_zcr_vq_isb(vcpu_sve_max_vq(vcpu) - 1, SYS_ZCR_EL2); __sve_restore_state(vcpu_sve_pffr(vcpu), &vcpu->arch.ctxt.fp_regs.fpsr); write_sysreg_el1(__vcpu_sys_reg(vcpu, ZCR_EL1), SYS_ZCR);
diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c
index b28d7d8cdc30..cef51fe80aa8 100644
--- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c
+++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c@@ -31,8 +31,7 @@ static void __hyp_sve_save_guest(struct kvm_vcpu *vcpu) * the guest. The layout of the data when saving the sve state depends * on the VL, so use a consistent (i.e., the maximum) guest VL. */ - sve_cond_update_zcr_vq(vcpu_sve_max_vq(vcpu) - 1, SYS_ZCR_EL2); - isb(); + sve_cond_update_zcr_vq_isb(vcpu_sve_max_vq(vcpu) - 1, SYS_ZCR_EL2); __sve_save_state(vcpu_sve_pffr(vcpu), &vcpu->arch.ctxt.fp_regs.fpsr); write_sysreg_s(ZCR_ELx_LEN_MASK, SYS_ZCR_EL2); }
--
2.45.1.288.g0e0cd299f1-goog
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