[PATCH v12 5/8] perf: imx_perf: fix counter start and config sequence
From: Xu Yang <xu.yang_2@nxp.com>
Date: 2024-05-29 08:05:10
Also in:
imx, linux-devicetree, linux-perf-users, lkml
Subsystem:
arm pmu profiling and debugging, freescale imx ddr pmu driver, the rest · Maintainers:
Will Deacon, Mark Rutland, Frank Li, Xu Yang, Linus Torvalds
In current driver, the counter will start firstly and then be configured.
This sequence is not correct for AXI filter events since the correct
AXI_MASK and AXI_ID are not set yet. Then the results may be inaccurate.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Fixes: 55691f99d417 ("drivers/perf: imx_ddr: Add support for NXP i.MX9 SoC DDRC PMU driver")
cc: <redacted>
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
Changes in v5:
- new patch
Changes in v6:
- no changes
Changes in v7:
- no changes
Changes in v8:
- add fix tag
Changes in v9:
- add Rb tag
Changes in v10:
- no changes
Changes in v11:
- no changes
Changes in v12:
- no changes
---
drivers/perf/fsl_imx9_ddr_perf.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/perf/fsl_imx9_ddr_perf.c b/drivers/perf/fsl_imx9_ddr_perf.c
index 5433c52a9872..7b43b54920da 100644
--- a/drivers/perf/fsl_imx9_ddr_perf.c
+++ b/drivers/perf/fsl_imx9_ddr_perf.c@@ -541,12 +541,12 @@ static int ddr_perf_event_add(struct perf_event *event, int flags) hwc->idx = counter; hwc->state |= PERF_HES_STOPPED; - if (flags & PERF_EF_START) - ddr_perf_event_start(event, flags); - /* read trans, write trans, read beat */ imx93_ddr_perf_monitor_config(pmu, event_id, counter, cfg1, cfg2); + if (flags & PERF_EF_START) + ddr_perf_event_start(event, flags); + return 0; }
--
2.34.1
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