Re: [PATCH v2 1/7] dt-bindings: pci: xilinx-nwl: Add phys
From: Rob Herring <robh@kernel.org>
Date: 2024-05-07 20:06:43
Also in:
linux-devicetree, linux-pci, lkml
On Mon, May 06, 2024 at 12:15:04PM -0400, Sean Anderson wrote:
quoted hunk ↗ jump to hunk
Add phys properties so Linux can power-on/configure the GTR transcievers. Signed-off-by: Sean Anderson <sean.anderson@linux.dev> --- Changes in v2: - Remove phy-names - Add an example Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml | 6 ++++++ 1 file changed, 6 insertions(+)diff --git a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml index 426f90a47f35..693b29039a9b 100644 --- a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml@@ -61,6 +61,10 @@ properties: interrupt-map: maxItems: 4 + phys: + minItems: 1 + maxItems: 4
I assume this is 1 phy per lane, but don't make me assume and define it. Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel