On 2/13/2024 4:19 PM, Easwar Hariharan wrote:

On 2/12/2024 3:44 PM, Oliver Upton wrote:

quoted

Hi Easwar,

On Mon, Feb 12, 2024 at 11:29:06PM +0000, Easwar Hariharan wrote:

quoted

Add the MIDR value of Microsoft Azure Cobalt 100, which is a Microsoft
implemented CPU based on r0p0 of the ARM Neoverse N2 CPU, and therefore
suffers from all the same errata.

Can you comment at all on where one might find this MIDR? That is, does
your hypervisor report the native MIDR of the implementation or does it
repaint it as an Arm Neoverse N2 (0x410FD490)?

We will check on the Microsoft hypervisor's plans, and get back to you.

Notwithstanding that, we do have baremetal use cases for Microsoft Azure Cobalt 100
as well where this MIDR value will show through.

<snip>

We checked in with our Microsoft hypervisor colleagues, and they do repaint the
Azure Cobalt 100 as an Arm Neoverse N2, but again, we do have baremetal use cases. 

Thanks,
Easwar


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel