On Sat, 10 Feb 2024 14:45:58 -0600
Adam Ford [off-list ref] wrote:

From: Lucas Stach <l.stach@pengutronix.de>

This adds the driver for the Samsung HDMI PHY found on the
i.MX8MP SoC. Based on downstream implementation from
Sandor Yu [off-list ref].  According to the TRM, the PHY
receives parallel data from the link and serializes it.  It
also sets the PLL clock needed for the TX serializer.

Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com> (v2)
Tested-by: Richard Leitner <richard.leitner@skidata.com> (v2)
Co-developed-by: Marco Felsch <redacted>
Signed-off-by: Marco Felsch <redacted>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Alexander Stein <redacted>
Tested-by: Frieder Schrempf <redacted> # Kontron BL
Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Signed-off-by: Adam Ford <redacted>

[...]

+static int phy_clk_register(struct fsl_samsung_hdmi_phy *phy)
+{
+	struct device *dev = phy->dev;
+	struct device_node *np = dev->of_node;
+	struct clk_init_data init;
+	const char *parent_name;
+	struct clk *phyclk;
+	int ret;
+
+	parent_name = __clk_get_name(phy->refclk);
+
+	init.parent_names = &parent_name;
+	init.num_parents = 1;
+	init.flags = 0;
+	init.name = "hdmi_pclk";
+	init.ops = &phy_clk_ops;
+
+	phy->hw.init = &init;
+
+	phyclk = devm_clk_register(dev, &phy->hw);
+	if (IS_ERR(phyclk))
+		return dev_err_probe(dev, PTR_ERR(phyclk),
+				     "failed to register clock\n");
+
+	ret = of_clk_add_provider(np, of_clk_src_simple_get, phyclk);

As per my v8 review, this function is deprecated:
https://elixir.bootlin.com/linux/v6.8-rc4/source/drivers/clk/clk.c#L4881

However:

[Tested using Avnet MSC SM2S-IMX8PLUS SoM on Avnet MSC SM2-MB-EP1]
Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com>

Luca

-- 
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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