Re: [PATCH V8 11/12] arm64: dts: imx8mp: add HDMI display pipeline
From: Alexander Stein <hidden>
Date: 2024-02-05 07:29:52
Also in:
dri-devel, linux-devicetree, linux-phy, linux-pm, lkml
Hi Adam, thanks for working on this. Am Samstag, 3. Februar 2024, 17:52:51 CET schrieb Adam Ford:
quoted hunk ↗ jump to hunk
From: Lucas Stach <l.stach@pengutronix.de> This adds the DT nodes for all the peripherals that make up the HDMI display pipeline. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Adam Ford <redacted> --- V2: I took this from Lucas' original submission with the following: Removed extra clock from HDMI-TX since it is now part of the power domain Added interrupt-parent to PVI Changed the name of the HDMI tranmitter to fsl,imx8mp-hdmi-tx Added ports to HDMI-tx --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 94 +++++++++++++++++++++++ 1 file changed, 94 insertions(+)diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsib/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 5e51a766f3d9..e84b4f40e570 100644--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi@@ -1412,6 +1412,100 @@ irqsteer_hdmi: interrupt-controller@32fc2000 { clock-names = "ipg"; power-domains = <&hdmi_blk_ctrl
IMX8MP_HDMIBLK_PD_IRQSTEER>;
};
+
+ hdmi_pvi: display-bridge@32fc4000 {
+ compatible = "fsl,imx8mp-hdmi-pvi";
+ reg = <0x32fc4000 0x40>;
+ interrupt-parent = <&irqsteer_hdmi>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;irqsteer_hdmi has #interrupt-cells = <1>, so IRQ flags should be removed. dtbs_check also warns about this.
+ power-domains = <&hdmi_blk_ctrl
IMX8MP_HDMIBLK_PD_PVI>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ pvi_from_lcdif3: endpoint {+ remote-
endpoint = <&lcdif3_to_pvi>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ pvi_to_hdmi_tx: endpoint {+ remote-
endpoint = <&hdmi_tx_from_pvi>;
+ };
+ };
+ };
+ };
+
+ lcdif3: display-controller@32fc6000 {
+ compatible = "fsl,imx8mp-lcdif";
+ reg = <0x32fc6000 0x238>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;irqsteer_hdmi has #interrupt-cells = <1>, so IRQ flags should be removed. dtbs_check also warns about this.
+ interrupt-parent = <&irqsteer_hdmi>; + clocks = <&hdmi_tx_phy>, + <&clk IMX8MP_CLK_HDMI_APB>, + <&clk
IMX8MP_CLK_HDMI_ROOT>;
+ clock-names = "pix", "axi",
"disp_axi";
+ power-domains = <&hdmi_blk_ctrl
IMX8MP_HDMIBLK_PD_LCDIF>;
+
+ port {
+ lcdif3_to_pvi: endpoint {
+ remote-endpoint = <&pvi_from_lcdif3>;
+ };
+ };
+ };
+
+ hdmi_tx: hdmi@32fd8000 {
+ compatible = "fsl,imx8mp-hdmi-tx";
+ reg = <0x32fd8000 0x7eff>;
+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;irqsteer_hdmi has #interrupt-cells = <1>, so IRQ flags should be removed. dtbs_check also warns about this.
+ interrupt-parent = <&irqsteer_hdmi>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>, + <&clk
IMX8MP_CLK_HDMI_REF_266M>,
+ <&clk IMX8MP_CLK_32K>, + <&hdmi_tx_phy>; + clock-names = "iahb", "isfr", "cec",
"pix";
+ assigned-clocks = <&clk
IMX8MP_CLK_HDMI_REF_266M>;
+ assigned-clock-parents = <&clk
IMX8MP_SYS_PLL1_266M>;
+ power-domains = <&hdmi_blk_ctrl
IMX8MP_HDMIBLK_PD_HDMI_TX>;
+ reg-io-width = <1>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ hdmi_tx_from_pvi: endpoint {+ remote-
endpoint = <&pvi_to_hdmi_tx>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ /* Point endpoint to the HDMI connector */
+ };
+ };
+ };
+
+ hdmi_tx_phy: phy@32fdff00 {
+ compatible = "fsl,imx8mp-hdmi-phy";
+ reg = <0x32fdff00 0x100>;
+ clocks = <&clk IMX8MP_CLK_HDMI_APB>,
+ <&clk IMX8MP_CLK_HDMI_24M>;
+ clock-names = "apb", "ref";
+ assigned-clocks = <&clk IMX8MP_CLK_HDMI_24M>;
+ assigned-clock-parents = <&clk
IMX8MP_CLK_24M>;
+ power-domains = <&hdmi_blk_ctrl
IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>;
+ #clock-cells = <0>; + #phy-cells = <0>; + status = "disabled"; + };
According to RM these blocks are part of AIPS4, so it should be below hsio_blk_ctrl. Best regards, Alexander
};
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