[PATCH v2 2/2] arm64: dts: s32g: add uSDHC node
From: Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com>
Date: 2024-01-22 14:06:26
Also in:
linux-clk, linux-devicetree, lkml
Subsystem:
arm/freescale imx / mxc arm architecture, arm/nxp s32g architecture, the rest · Maintainers:
Frank Li, Sascha Hauer, Linus Torvalds
From: Ghennadi Procopciuc <redacted> Add the uSDHC node for the boards that are based on S32G SoCs. Signed-off-by: Ciprian Costea <redacted> Signed-off-by: Ghennadi Procopciuc <redacted> --- arch/arm64/boot/dts/freescale/s32g2.dtsi | 10 ++++++++++ arch/arm64/boot/dts/freescale/s32g274a-evb.dts | 6 +++++- arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 6 +++++- 3 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index ef1a1d61f2ba..fc19ae2e8d3b 100644
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi@@ -138,6 +138,16 @@ uart2: serial@402bc000 { status = "disabled"; }; + usdhc0: mmc@402f0000 { + compatible = "nxp,s32g2-usdhc"; + reg = <0x402f0000 0x1000>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks 32>, <&clks 31>, <&clks 33>; + clock-names = "ipg", "ahb", "per"; + bus-width = <8>; + status = "disabled"; + }; + gic: interrupt-controller@50800000 { compatible = "arm,gic-v3"; reg = <0x50800000 0x10000>,
diff --git a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
index 9118d8d2ee01..00070c949e2a 100644
--- a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
+++ b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts@@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* * Copyright (c) 2021 SUSE LLC - * Copyright (c) 2019-2021 NXP + * Copyright 2019-2021, 2024 NXP */ /dts-v1/;
@@ -32,3 +32,7 @@ memory@80000000 { &uart0 { status = "okay"; }; + +&usdhc0 { + status = "okay"; +};
diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
index e05ee854cdf5..b3fc12899cae 100644
--- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
+++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts@@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* * Copyright (c) 2021 SUSE LLC - * Copyright (c) 2019-2021 NXP + * Copyright 2019-2021, 2024 NXP */ /dts-v1/;
@@ -38,3 +38,7 @@ &uart0 { &uart1 { status = "okay"; }; + +&usdhc0 { + status = "okay"; +};
--
2.43.0
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